When DSC is enabled on a pipe, the pipe pixel rate input to cdclk frequency
and pipe joiner calculations needs to be adjusted to account for
compression overhead: specifically, the "bubbles" added at each horizontal
slice boundary. This overhead has always existed, even on earlier
platforms, but was not previously accounted for.
Currently, the number of joined pipes is computed much earlier than the
decision to use DSC: both during the mode_valid phase for each mode and in
the compute_config phase for a given mode. As a result, the DSC bubble
overhead cannot be considered when determining the number of pipes to join,
which may lead to incorrect configurations.
This series refactors the sequence of steps used to determine the number of
pipes to be joined and the DSC policy. The first few patches restructure
the mode_valid and compute config logic to make room for DSC bubble
overhead accounting. With these, we iterate over joiner candidates and
select the minimal joiner configuration that satisfies the
mode-requirements. The later patches introduce the actual overhead
adjustment and use it for: the minimum cdclk requirements with DSC,
SST mode_valid logic, and SST/MST compute_config logic.
Rev 2:
- Refactor joiner computation for compute config.
- Refactor DSC BW calculation.
- Add overhead for SST/MST compute config phase for recomputing joiner
requirements for DSC.
- NOTE:
- For Patch#7 (drm/i915/dp: Rework pipe joiner logic in mode_valid)
git diff = --patience is used for better readability.
Rev 3:
- Use diff = --patience in format-patch for better readability.
- Add a macro to iterate over the joiner candidates.
- Add a separate helper to check pixel rate against dotclock limit.
- Add patch from Chaitanya for additional platform specific
limitations [1].
[1] https://patchwork.freedesktop.org/patch/661952/?series=151047&rev=1
Ankit Nautiyal (13):
drm/i915/dp: Early reject bad hdisplay in intel_dp_mode_valid
drm/i915/dp: Move num_joined_pipes and related checks together
drm/i915/dp: Extract helper to get the hdisplay limit
drm/i915/dp: Rework pipe joiner logic in mode_valid
drm/i915/dp: Rework pipe joiner logic in compute_config
drm/i915/dp_mst: Move the check for dotclock at the end
drm/i915/dp_mst: Move the joiner dependent code together
drm/i915/dp_mst: Rework pipe joiner logic in mode_valid
drm/i915/dp_mst: Extract helper to compute link for given joiner
config
drm/i915/dp_mst: Rework pipe joiner logic in compute_config
drm/i915/dp: Introduce helper to check pixel rate against dotclock
limits
drm/i915/dp: Refactor dsc_slice_count handling in
intel_dp_mode_valid()
drm/i915/dp: Account for DSC slice overhead
Chaitanya Kumar Borah (1):
drm/i915/display: Add upper limit check for pixel clock
drivers/gpu/drm/i915/display/intel_display.c | 12 +
drivers/gpu/drm/i915/display/intel_display.h | 1 +
drivers/gpu/drm/i915/display/intel_dp.c | 297 ++++++++++++++-----
drivers/gpu/drm/i915/display/intel_dp.h | 13 +
drivers/gpu/drm/i915/display/intel_dp_mst.c | 217 ++++++++++----
drivers/gpu/drm/i915/display/intel_vdsc.c | 1 -
drivers/gpu/drm/i915/display/intel_vdsc.h | 3 +
7 files changed, 402 insertions(+), 142 deletions(-)
--
2.45.2
