On Thu, Jan 15, 2026 at 10:52:46AM -0500, Rodrigo Vivi wrote: > Hi Dave and Sima, > > Here goes our likely last drm-intel-next PR towards 7.0. > > Thanks, > Rodrigo. > > drm-intel-next-2026-01-15:
Dave, Sima, anything wrong with this one? I noticed this was not picked up yet. the drm-intel-next-2026-01-15-1 is indeed messed up, but this one here should be okay. Please let me know if anything is missing. Sorry and thanks, Rodrigo. > Beyond Display: > - Make 'guc_hw_reg_state' static as it isn't exported (Ben) > - Fix doc build on mei related interface header (Jani) > > Display related: > - Fix ggtt fb alignment on Xe display (Tvrtko) > - More display clean-up towards deduplication and full separation (Jani) > - Use the consolidated HDMI tables (Suraj) > - Account for DSC slice overhead (Ankit) > - Prepare GVT for display modularization (Ankit, Jani) > - Enable/Disable DC balance along with VRR DSB (Mitul, Ville) > - Protection against unsupported modes in LT PHY (Suraj) > - Display W/a addition and fixes (Gustavo) > - Fix many SPDX identifier comments (Ankit) > - Incorporate Xe3_LPD changes for CD2X divider (Gustavo) > - Clean up link BW/DSC slice config computation (Imre) > The following changes since commit 35ec71285c9311395b14bedc60fa94f6b7e24d2d: > > drm/i915/pc8: Add parent interface for PC8 forcewake tricks (2025-12-19 > 21:28:48 +0200) > > are available in the Git repository at: > > https://gitlab.freedesktop.org/drm/i915/kernel.git > tags/drm-intel-next-2026-01-15 > > for you to fetch changes up to d30f75d2dba913754dbacb982b19b783a30253ea: > > drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST > (2026-01-13 18:42:21 +0200) > > ---------------------------------------------------------------- > Beyond Display: > - Make 'guc_hw_reg_state' static as it isn't exported (Ben) > - Fix doc build on mei related interface header (Jani) > > Display related: > - Fix ggtt fb alignment on Xe display (Tvrtko) > - More display clean-up towards deduplication and full separation (Jani) > - Use the consolidated HDMI tables (Suraj) > - Account for DSC slice overhead (Ankit) > - Prepare GVT for display modularization (Ankit, Jani) > - Enable/Disable DC balance along with VRR DSB (Mitul, Ville) > - Protection against unsupported modes in LT PHY (Suraj) > - Display W/a addition and fixes (Gustavo) > - Fix many SPDX identifier comments (Ankit) > - Incorporate Xe3_LPD changes for CD2X divider (Gustavo) > - Clean up link BW/DSC slice config computation (Imre) > > ---------------------------------------------------------------- > Ankit Nautiyal (16): > drm/i915/vdsc: Account for DSC slice overhead in intel_vdsc_min_cdclk() > drm/i915/display: Abstract pipe/trans/cursor offset calculation > drm/i915/display: Add APIs to be used by gvt to get the register offsets > drm/i915/gvt: Add header to use display offset functions in macros > drm/i915/gvt: Change for_each_pipe to use pipe_valid API > drm/i915/gvt: Use the appropriate header for the DPLL macro > drm/i915/gvt/display_helper: Get rid of #ifdef/#undefs > drm/i915/intel_alpm: Fix the SPDX identifier comment > drm/i915/intel_cx0_phy: Fix the SPDX identifier comment > drm/i915/intel_cx0_phy_regs: Fix the SPDX identifier comment > drm/i915/intel_display_params: Fix the SPDX identifier comment > drm/i915/intel_dsb: Fix the SPDX identifier comment > drm/i915/intel_dsb_buffer: Fix the SPDX identifier comment > drm/i915/intel_gvt_api: Fix the SPDX identifier comment > drm/i915/intel_lt_phy: Fix the SPDX identifier comment > drm/i915/lt_phy_regs: Fix the SPDX identifier comment > > Ben Dooks (1): > drm/i915/guc: make 'guc_hw_reg_state' static as it isn't exported > > Gustavo Sousa (3): > drm/i915/display_wa: Keep enum intel_display_wa sorted > drm/i915/cdclk: Implement Wa_13012396614 > drm/i915/cdclk: Incorporate Xe3_LPD changes for CD2X divider > > Imre Deak (19): > drm/i915/dp: Drop unused timeslots param from dsc_compute_link_config() > drm/i915/dp: Factor out align_max_sink_dsc_input_bpp() > drm/i915/dp: Factor out align_max_vesa_compressed_bpp_x16() > drm/i915/dp: Align min/max DSC input BPPs to sink caps > drm/i915/dp: Align min/max compressed BPPs when calculating BPP limits > drm/i915/dp: Drop intel_dp parameter from > intel_dp_compute_config_link_bpp_limits() > drm/i915/dp: Pass intel_output_format to > intel_dp_dsc_sink_{min_max}_compressed_bpp() > drm/i915/dp: Pass mode clock to dsc_throughput_quirk_max_bpp_x16() > drm/i915/dp: Factor out compute_min_compressed_bpp_x16() > drm/i915/dp: Factor out compute_max_compressed_bpp_x16() > drm/i915/dp: Add intel_dp_mode_valid_with_dsc() > drm/i915/dp: Unify detect and compute time DSC mode BW validation > drm/i915/dp: Use helpers to align min/max compressed BPPs > drm/i915/dp: Simplify computing DSC BPPs for eDP > drm/i915/dp: Simplify computing DSC BPPs for DP-SST > drm/i915/dp: Simplify computing forced DSC BPP for DP-SST > drm/i915/dp: Unify computing compressed BPP for DP-SST and eDP > drm/i915/dp: Simplify eDP vs. DP compressed BPP computation > drm/i915/dp: Simplify computing the DSC compressed BPP for DP-MST > > Jani Nikula (30): > drm/i915: move display/intel_plane_initial.c to i915_initial_plane.c > drm/xe/display: rename xe_plane_initial.c to xe_initial_plane.c > drm/i915: rename intel_plane_initial.h to intel_initial_plane.h > drm/{i915, xe}: move initial plane calls to parent interface > drm/{i915, xe}: deduplicate intel_initial_plane_config() between i915 > and xe > drm/{i915, xe}: deduplicate plane_config_fini() between i915 and xe > drm/{i915, xe}: start deduplicating intel_find_initial_plane_obj() > between i915 and xe > drm/i915: return plane_state from intel_reuse_initial_plane_obj() > drm/xe: return plane_state from intel_reuse_initial_plane_obj() > drm/i915: further deduplicate intel_find_initial_plane_obj() > drm/{i915, xe}: deduplicate intel_alloc_initial_plane_obj() FB modifier > checks > drm/{i915,xe}: deduplicate initial plane setup > drm/{i915, xe}: pass struct drm_plane_state instead of struct drm_crtc > to ->setup > drm/{i915, xe}: pass struct drm_device instead of drm_device to > ->alloc_obj > drm/i915: drop dependency on struct intel_display from i915 initial > plane > drm/xe/display: drop i915_utils.h > drm/i915: remove unused dev_priv local variable > drm/xe/compat: remove unused forcewake get/put macros > drm/xe/compat: convert uncore macro to static inlines > drm/i915/display: use to_intel_uncore() to avoid i915_drv.h > drm/i915: drop i915 param from i915_fence{, _context}_timeout() > drm/xe: remove compat i915_drv.h and -Ddrm_i915_private=xe_device hack > drm/i915/utils: drop unnecessary ifdefs > drm/i915/display: remove accidentally added empty file > drm/i915/gvt: sort and group include directives > drm/i915/gvt: include sched_policy.h only where needed > drm/i915/gvt: reduce include of gt/intel_engine_regs.h > drm/i915/gvt: reduce include of vfio.h > drm/i915/gvt: include intel_display_limits.h where needed > mei: late_bind: fix struct intel_lb_component_ops kernel-doc > > Mitul Golani (12): > drm/i915/display: Add source param for dc balance > drm/i915/vrr: Add VRR DC balance registers > drm/i915/vrr: Add DC Balance params to crtc_state > drm/i915/vrr: Add state dump for DC Balance params > drm/i915/vrr: Add compute config for DC Balance params > drm/i915/vrr: Add function to check if DC Balance Possible > drm/i915/vrr: Add function to reset DC balance accumulated params > drm/i915/display: Add DC Balance flip count operations > drm/i915/vrr: Write DC balance params to hw registers > drm/i915/display: Wait for VRR PUSH status update > drm/i915/display: Add function to configure event for dc balance > drm/i915/vrr: Enable DC Balance > > Suraj Kandpal (4): > drm/i915/cx0: Use the consolidated HDMI tables > drm/i915/ltphy: Remove state verification for LT PHY fields > drm/i915/ltphy: Compare only certain fields in state verify function > drm/i915/ltphy: Provide protection against unsupported modes > > Tvrtko Ursulin (1): > drm/xe: Fix ggtt fb alignment > > Ville Syrjälä (6): > drm/i915/dmc: Add pipe dmc registers and bits for DC Balance > drm/i915/vrr: Add functions to read out vmin/vmax stuff > drm/i915/vblank: Extract vrr_vblank_start() > drm/i915/vrr: Implement vblank evasion with DC balancing > drm/i915/dsb: Add pipedmc dc balance enable/disable > drm/i915/vrr: Pause DC Balancing for DSB commits > > drivers/gpu/drm/i915/Makefile | 6 +- > drivers/gpu/drm/i915/display/i9xx_wm.c | 17 +- > drivers/gpu/drm/i915/display/intel_alpm.h | 4 +- > drivers/gpu/drm/i915/display/intel_bw.c | 19 +- > drivers/gpu/drm/i915/display/intel_cdclk.c | 60 ++- > drivers/gpu/drm/i915/display/intel_connector.c | 2 - > .../gpu/drm/i915/display/intel_crtc_state_dump.c | 8 + > drivers/gpu/drm/i915/display/intel_cx0_phy.c | 13 +- > drivers/gpu/drm/i915/display/intel_cx0_phy.h | 2 +- > drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h | 4 +- > drivers/gpu/drm/i915/display/intel_display.c | 46 +- > .../gpu/drm/i915/display/intel_display_device.h | 18 + > .../gpu/drm/i915/display/intel_display_driver.c | 4 +- > .../gpu/drm/i915/display/intel_display_params.h | 2 +- > drivers/gpu/drm/i915/display/intel_display_power.c | 3 +- > .../gpu/drm/i915/display/intel_display_reg_defs.h | 15 +- > drivers/gpu/drm/i915/display/intel_display_types.h | 11 + > drivers/gpu/drm/i915/display/intel_display_utils.h | 4 - > drivers/gpu/drm/i915/display/intel_display_wa.c | 14 +- > drivers/gpu/drm/i915/display/intel_display_wa.h | 12 +- > drivers/gpu/drm/i915/display/intel_dmc.c | 25 + > drivers/gpu/drm/i915/display/intel_dmc.h | 5 + > drivers/gpu/drm/i915/display/intel_dmc_regs.h | 60 +++ > drivers/gpu/drm/i915/display/intel_dp.c | 515 > ++++++++++----------- > drivers/gpu/drm/i915/display/intel_dp.h | 17 +- > drivers/gpu/drm/i915/display/intel_dp_mst.c | 77 +-- > drivers/gpu/drm/i915/display/intel_dram.c | 42 +- > drivers/gpu/drm/i915/display/intel_dsb.c | 31 +- > drivers/gpu/drm/i915/display/intel_dsb.h | 4 +- > drivers/gpu/drm/i915/display/intel_dsb_buffer.h | 4 +- > drivers/gpu/drm/i915/display/intel_gvt_api.c | 43 ++ > drivers/gpu/drm/i915/display/intel_gvt_api.h | 21 + > drivers/gpu/drm/i915/display/intel_initial_plane.c | 193 ++++++++ > ...intel_plane_initial.h => intel_initial_plane.h} | 6 +- > drivers/gpu/drm/i915/display/intel_lt_phy.c | 54 +-- > drivers/gpu/drm/i915/display/intel_lt_phy.h | 4 +- > drivers/gpu/drm/i915/display/intel_lt_phy_regs.h | 4 +- > drivers/gpu/drm/i915/display/intel_plane_initial.c | 442 ------------------ > drivers/gpu/drm/i915/display/intel_rom.c | 8 +- > drivers/gpu/drm/i915/display/intel_vblank.c | 46 +- > drivers/gpu/drm/i915/display/intel_vdsc.c | 35 +- > drivers/gpu/drm/i915/display/intel_vrr.c | 281 ++++++++++- > drivers/gpu/drm/i915/display/intel_vrr.h | 10 + > drivers/gpu/drm/i915/display/intel_vrr_regs.h | 68 +++ > drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 2 +- > drivers/gpu/drm/i915/gvt/aperture_gm.c | 5 +- > drivers/gpu/drm/i915/gvt/cfg_space.c | 2 +- > drivers/gpu/drm/i915/gvt/cmd_parser.c | 26 +- > drivers/gpu/drm/i915/gvt/debugfs.c | 4 +- > drivers/gpu/drm/i915/gvt/display.c | 23 +- > drivers/gpu/drm/i915/gvt/display.h | 2 +- > drivers/gpu/drm/i915/gvt/display_helpers.h | 37 ++ > drivers/gpu/drm/i915/gvt/dmabuf.c | 6 +- > drivers/gpu/drm/i915/gvt/dmabuf.h | 7 +- > drivers/gpu/drm/i915/gvt/edid.c | 1 + > drivers/gpu/drm/i915/gvt/execlist.c | 2 +- > drivers/gpu/drm/i915/gvt/fb_decoder.c | 14 +- > drivers/gpu/drm/i915/gvt/fb_decoder.h | 2 - > drivers/gpu/drm/i915/gvt/firmware.c | 4 +- > drivers/gpu/drm/i915/gvt/gtt.c | 9 +- > drivers/gpu/drm/i915/gvt/gvt.h | 26 +- > drivers/gpu/drm/i915/gvt/handlers.c | 21 +- > drivers/gpu/drm/i915/gvt/interrupt.c | 5 +- > drivers/gpu/drm/i915/gvt/kvmgt.c | 24 +- > drivers/gpu/drm/i915/gvt/mmio.c | 13 +- > drivers/gpu/drm/i915/gvt/mmio_context.h | 5 - > drivers/gpu/drm/i915/gvt/opregion.c | 3 +- > drivers/gpu/drm/i915/gvt/page_track.c | 3 +- > drivers/gpu/drm/i915/gvt/sched_policy.c | 3 +- > drivers/gpu/drm/i915/gvt/scheduler.c | 8 +- > drivers/gpu/drm/i915/gvt/trace.h | 2 +- > drivers/gpu/drm/i915/gvt/trace_points.c | 2 + > drivers/gpu/drm/i915/gvt/vgpu.c | 6 +- > drivers/gpu/drm/i915/i915_config.c | 3 +- > drivers/gpu/drm/i915/i915_config.h | 10 +- > drivers/gpu/drm/i915/i915_driver.c | 2 + > drivers/gpu/drm/i915/i915_gpu_error.c | 2 +- > drivers/gpu/drm/i915/i915_initial_plane.c | 290 ++++++++++++ > drivers/gpu/drm/i915/i915_initial_plane.h | 9 + > drivers/gpu/drm/i915/i915_request.c | 3 +- > drivers/gpu/drm/i915/i915_utils.h | 4 - > drivers/gpu/drm/i915/intel_gvt.c | 13 +- > drivers/gpu/drm/i915/intel_gvt_mmio_table.c | 4 +- > drivers/gpu/drm/xe/Makefile | 6 +- > .../gpu/drm/xe/compat-i915-headers/i915_config.h | 5 +- > drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h | 22 - > .../gpu/drm/xe/compat-i915-headers/i915_utils.h | 7 - > .../gpu/drm/xe/compat-i915-headers/intel_uncore.h | 11 +- > drivers/gpu/drm/xe/display/xe_display.c | 2 + > drivers/gpu/drm/xe/display/xe_fb_pin.c | 2 +- > drivers/gpu/drm/xe/display/xe_initial_plane.c | 189 ++++++++ > drivers/gpu/drm/xe/display/xe_initial_plane.h | 9 + > drivers/gpu/drm/xe/display/xe_plane_initial.c | 321 ------------- > include/drm/intel/display_parent_interface.h | 17 + > include/drm/intel/intel_lb_mei_interface.h | 3 +- > 95 files changed, 2017 insertions(+), 1443 deletions(-) > create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.c > create mode 100644 drivers/gpu/drm/i915/display/intel_gvt_api.h > create mode 100644 drivers/gpu/drm/i915/display/intel_initial_plane.c > rename drivers/gpu/drm/i915/display/{intel_plane_initial.h => > intel_initial_plane.h} (60%) > delete mode 100644 drivers/gpu/drm/i915/display/intel_plane_initial.c > create mode 100644 drivers/gpu/drm/i915/gvt/display_helpers.h > create mode 100644 drivers/gpu/drm/i915/i915_initial_plane.c > create mode 100644 drivers/gpu/drm/i915/i915_initial_plane.h > delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_drv.h > delete mode 100644 drivers/gpu/drm/xe/compat-i915-headers/i915_utils.h > create mode 100644 drivers/gpu/drm/xe/display/xe_initial_plane.c > create mode 100644 drivers/gpu/drm/xe/display/xe_initial_plane.h > delete mode 100644 drivers/gpu/drm/xe/display/xe_plane_initial.c
