On Wed, Jan 21, 2026 at 09:23:27AM +0530, Ankit Nautiyal wrote:
> Add intel_dp_pixel_rate_fits_dotclk() helper, that checks the
> required pixel rate against platform dotclock limit.
> With joined pipes the effective dotclock limit depends upon the number
> of joined pipes.
>
> Call the helper from the mode_valid phase and from the compute_config
> phase where we need to check the limits for the given target clock for a
> given joiner candidate.
>
> Signed-off-by: Ankit Nautiyal <[email protected]>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 26 ++++++++++++++-------
> drivers/gpu/drm/i915/display/intel_dp.h | 3 +++
> drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 +++++------
> 3 files changed, 27 insertions(+), 16 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
> b/drivers/gpu/drm/i915/display/intel_dp.c
> index 2ead783129f4..ed81cf4adb9b 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -1440,6 +1440,18 @@ bool intel_dp_has_dsc(const struct intel_connector
> *connector)
> return true;
> }
>
> +bool intel_dp_pixel_rate_fits_dotclk(struct intel_display *display,
intel_dp_dotclk_valid()?
> + int target_clock,
> + int num_joined_pipes)
> +{
> + int max_dotclk = display->cdclk.max_dotclk_freq;
> + int effective_dotclk_limit;
> +
> + effective_dotclk_limit = max_dotclk * num_joined_pipes;
> +
> + return target_clock <= effective_dotclk_limit;
> +}
> +
> static enum drm_mode_status
> intel_dp_mode_valid(struct drm_connector *_connector,
> const struct drm_display_mode *mode)
> @@ -1495,7 +1507,6 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> link_bpp_x16, 0);
>
> for (i = 0; i < ARRAY_SIZE(joiner_candidates); i++) {
> - int max_dotclk = display->cdclk.max_dotclk_freq;
> enum joiner_type joiner = joiner_candidates[i];
>
> status = MODE_CLOCK_HIGH;
> @@ -1569,9 +1580,9 @@ intel_dp_mode_valid(struct drm_connector *_connector,
> if (status != MODE_OK)
> continue;
>
> - max_dotclk *= num_joined_pipes;
> -
> - if (target_clock <= max_dotclk) {
> + if (intel_dp_pixel_rate_fits_dotclk(display,
> + target_clock,
> + num_joined_pipes)) {
> status = MODE_OK;
> break;
> }
> @@ -2888,7 +2899,6 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
>
> for (i = 0; i < ARRAY_SIZE(joiner_candidates); i++) {
> enum joiner_type joiner = joiner_candidates[i];
> - int max_dotclk = display->cdclk.max_dotclk_freq;
>
> if (joiner == FORCED_JOINER) {
> if (!connector->force_joined_pipes)
> @@ -2930,9 +2940,9 @@ intel_dp_compute_link_config(struct intel_encoder
> *encoder,
> if (ret)
> continue;
>
> - max_dotclk *= num_joined_pipes;
> -
> - if (adjusted_mode->crtc_clock <= max_dotclk) {
> + if (intel_dp_pixel_rate_fits_dotclk(display,
> + adjusted_mode->crtc_clock,
> + num_joined_pipes)) {
> ret = 0;
> break;
> }
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.h
> b/drivers/gpu/drm/i915/display/intel_dp.h
> index e5913fba0143..0c1cd843bd0a 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.h
> +++ b/drivers/gpu/drm/i915/display/intel_dp.h
> @@ -233,5 +233,8 @@ int intel_dp_compute_config_late(struct intel_encoder
> *encoder,
> int intel_dp_sdp_min_guardband(const struct intel_crtc_state *crtc_state,
> bool assume_all_enabled);
> int intel_dp_hdisplay_limit(struct intel_display *display);
> +bool intel_dp_pixel_rate_fits_dotclk(struct intel_display *display,
> + int target_clock,
> + int num_joined_pipes);
>
> #endif /* __INTEL_DP_H__ */
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> index 46208ee67905..7c957351467e 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> @@ -710,7 +710,6 @@ static int mst_stream_compute_config(struct intel_encoder
> *encoder,
>
> for (i = 0; i < ARRAY_SIZE(joiner_candidates); i++) {
> enum joiner_type joiner = joiner_candidates[i];
> - int max_dotclk = display->cdclk.max_dotclk_freq;
>
> ret = -EINVAL;
>
> @@ -742,9 +741,9 @@ static int mst_stream_compute_config(struct intel_encoder
> *encoder,
> if (ret)
> continue;
>
> - max_dotclk *= num_joined_pipes;
> -
> - if (adjusted_mode->clock <= max_dotclk) {
> + if (intel_dp_pixel_rate_fits_dotclk(display,
> + adjusted_mode->clock,
> + num_joined_pipes)) {
> ret = 0;
> break;
> }
> @@ -1542,7 +1541,6 @@ mst_connector_mode_valid_ctx(struct drm_connector
> *_connector,
> }
>
> for (i = 0; i < ARRAY_SIZE(joiner_candidates); i++) {
> - int max_dotclk = display->cdclk.max_dotclk_freq;
> enum joiner_type joiner = joiner_candidates[i];
>
> *status = MODE_CLOCK_HIGH;
> @@ -1593,9 +1591,9 @@ mst_connector_mode_valid_ctx(struct drm_connector
> *_connector,
> if (*status != MODE_OK)
> continue;
>
> - max_dotclk *= num_joined_pipes;
> -
> - if (mode->clock <= max_dotclk) {
> + if (intel_dp_pixel_rate_fits_dotclk(display,
> + mode->clock,
> + num_joined_pipes)) {
> *status = MODE_OK;
> break;
> }
> --
> 2.45.2
>
