NVL-P is a new Intel platform that comes with the following IPs: - Xe3p_LPG graphics; - Xe3p_LPM media; - Xe3p_LPD display.
Enabling patches for Xe3p_LPM and Xe3p_LPD are already integrated in our driver. In this series we add patches enabling Xe3p_LPG and then follow up with patches enabling NVL-P as a platform in our driver. Signed-off-by: Gustavo Sousa <[email protected]> --- Changes in v2: - Added patch "drm/xe/nvlp: Bump maximum WOPCM size", which was missing in v1. - Incorporated review feedback. Please see the changelog in the individual patches for details. - Dropped patch "drm/xe/nvlp: Define GuC firmware for NVL-P". I'll apply this separately to topic/xe-for-CI and decided to drop from v2 to avoid accidentally applying it to drm-xe-next. - Link to v1: https://patch.msgid.link/[email protected] --- Aradhya Bhatia (1): drm/xe/xe3p_lpg: Set STLB bank hash mode to 4KB Dnyaneshwar Bhadane (1): drm/xe/nvlp: Attach MOCS table for nvlp Gustavo Sousa (3): drm/xe/pat: Differentiate between primary and media for PTA drm/xe/xe3p_lpg: Update LRC sizes drm/xe/nvlp: Bump maximum WOPCM size Matt Roper (7): drm/xe/xe3p_lpg: Add new PAT table drm/xe/xe3p_lpg: Add MCR steering drm/xe/xe3p_lpg: Add LRC parsing for additional RCS engine state drm/xe/xe3p_lpg: Disable reporting of context switch status to GHWSP drm/xe/xe3p_lpg: Drop unnecessary tuning settings drm/xe/xe3p_lpg: Extend 'group ID' mask size drm/i915/nvlp: Hook up display support Shekhar Chauhan (3): drm/xe/xe3p_lpg: Add support for graphics IP 35.10 drm/xe/xe3p_lpg: Add initial workarounds for graphics version 35.10 drm/xe/nvlp: Add NVL-P platform definition .../gpu/drm/i915/display/intel_display_device.c | 1 + .../gpu/drm/xe/instructions/xe_gfxpipe_commands.h | 10 +++ drivers/gpu/drm/xe/regs/xe_gt_regs.h | 20 +++++- drivers/gpu/drm/xe/xe_bo.c | 4 +- drivers/gpu/drm/xe/xe_device_types.h | 8 ++- drivers/gpu/drm/xe/xe_gt_mcr.c | 18 ++++- drivers/gpu/drm/xe/xe_lrc.c | 18 ++++- drivers/gpu/drm/xe/xe_mocs.c | 1 + drivers/gpu/drm/xe/xe_pat.c | 82 +++++++++++++++++++--- drivers/gpu/drm/xe/xe_pci.c | 21 ++++++ drivers/gpu/drm/xe/xe_platform_types.h | 1 + drivers/gpu/drm/xe/xe_reg_whitelist.c | 8 +++ drivers/gpu/drm/xe/xe_tuning.c | 22 +++++- drivers/gpu/drm/xe/xe_wa.c | 43 ++++++++++++ drivers/gpu/drm/xe/xe_wopcm.c | 15 +++- include/drm/intel/pciids.h | 12 ++++ 16 files changed, 259 insertions(+), 25 deletions(-) --- base-commit: 75acb0a8b6f69c6429941e6845df2af94ed15939 change-id: 20260130-nvl-p-upstreaming-e69efaf1db91 Best regards, -- Gustavo Sousa <[email protected]>
