[PATCH v2 03/24] drm/i915/lt_phy: Add PLL information for xe3plpd

[Mika Kahola]

Start bringing in xe3plpd as part of dpll framework. The work is
started by adding PLL information and related function hooks.

v2: Fix xe3plpd type (Suraj)
    Remove empty line between BSpec link and Signed-off-by (Suraj)

BSpec: 74304
Signed-off-by: Mika Kahola <mika.kah...@intel.com>
---
 drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 19 +++++++++++++++++++
 1 file changed, 19 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
index f35a9252f4e1..4185c8e136da 100644
--- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
@@ -4571,6 +4571,25 @@ static const struct intel_dpll_mgr mtl_pll_mgr = {
        .compare_hw_state = mtl_compare_hw_state,
 };
 
+static const struct intel_dpll_funcs xe3plpd_pll_funcs = {
+};
+
+static const struct dpll_info xe3plpd_plls[] = {
+       { .name = "DPLL 0", .funcs = &xe3plpd_pll_funcs, .id = 
DPLL_ID_ICL_DPLL0, },
+       { .name = "DPLL 1", .funcs = &xe3plpd_pll_funcs, .id = 
DPLL_ID_ICL_DPLL1, },
+       /* TODO: Add TBT */
+       { .name = "TC PLL 1", .funcs = &xe3plpd_pll_funcs, .id = 
DPLL_ID_ICL_MGPLL1, },
+       { .name = "TC PLL 2", .funcs = &xe3plpd_pll_funcs, .id = 
DPLL_ID_ICL_MGPLL2, },
+       { .name = "TC PLL 3", .funcs = &xe3plpd_pll_funcs, .id = 
DPLL_ID_ICL_MGPLL3, },
+       { .name = "TC PLL 4", .funcs = &xe3plpd_pll_funcs, .id = 
DPLL_ID_ICL_MGPLL4, },
+       {}
+};
+
+__maybe_unused
+static const struct intel_dpll_mgr xe3plpd_pll_mgr = {
+       .dpll_info = xe3plpd_plls,
+};
+
 /**
  * intel_dpll_init - Initialize DPLLs
  * @display: intel_display device
-- 
2.43.0