On Sat, Jul 12, 2014 at 02:54:33PM +0530, deepa...@linux.intel.com wrote:
> From: Deepak S <deepa...@linux.intel.com>
>
> Adding chv specific fre/encode conversion.
>
> v2: Remove generic function and platform check (Daniel)
>
> Signed-off-by: Deepak S <deepa...@linux.intel.com>
When resubmitting patches into an existing patchbomb thread please use
--in-reply-to the old patch this new one here replaces. Otherwise I'll
have a good chance to pick up patches out of order or the wrong ones.
Thanks, Daniel
> ---
> drivers/gpu/drm/i915/intel_pm.c | 78
> +++++++++++++++++++++++++++++++++++++++--
> 1 file changed, 76 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index 6892421..f673e1b 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -6931,7 +6931,7 @@ int sandybridge_pcode_write(struct drm_i915_private
> *dev_priv, u8 mbox, u32 val)
> return 0;
> }
>
> -int vlv_gpu_freq(struct drm_i915_private *dev_priv, int val)
> +int byt_gpu_freq(struct drm_i915_private *dev_priv, int val)
> {
> int div;
>
> @@ -6953,7 +6953,7 @@ int vlv_gpu_freq(struct drm_i915_private *dev_priv, int
> val)
> return DIV_ROUND_CLOSEST(dev_priv->mem_freq * (val + 6 - 0xbd), 4 *
> div);
> }
>
> -int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val)
> +int byt_freq_opcode(struct drm_i915_private *dev_priv, int val)
> {
> int mul;
>
> @@ -6975,6 +6975,80 @@ int vlv_freq_opcode(struct drm_i915_private *dev_priv,
> int val)
> return DIV_ROUND_CLOSEST(4 * mul * val, dev_priv->mem_freq) + 0xbd - 6;
> }
>
> +int chv_gpu_freq(struct drm_i915_private *dev_priv, int val)
> +{
> + int div, freq;
> +
> + switch (dev_priv->rps.cz_freq) {
> + case 200:
> + div = 5;
> + break;
> + case 267:
> + div = 6;
> + break;
> + case 320:
> + case 333:
> + case 400:
> + div = 8;
> + break;
> + default:
> + return -1;
> + }
> +
> + freq = (DIV_ROUND_CLOSEST((dev_priv->rps.cz_freq * val), 2 * div) / 2);
> +
> + return freq;
> +}
> +
> +int chv_freq_opcode(struct drm_i915_private *dev_priv, int val)
> +{
> + int mul, opcode;
> +
> + switch (dev_priv->rps.cz_freq) {
> + case 200:
> + mul = 5;
> + break;
> + case 267:
> + mul = 6;
> + break;
> + case 320:
> + case 333:
> + case 400:
> + mul = 8;
> + break;
> + default:
> + return -1;
> + }
> +
> + opcode = (DIV_ROUND_CLOSEST((val * 2 * mul), dev_priv->rps.cz_freq) *
> 2);
> +
> + return opcode;
> +}
> +
> +int vlv_gpu_freq(struct drm_i915_private *dev_priv, int val)
> +{
> + int ret = -1;
> +
> + if (IS_CHERRYVIEW(dev_priv->dev))
> + ret = chv_gpu_freq(dev_priv, val);
> + else if (IS_VALLEYVIEW(dev_priv->dev))
> + ret = byt_gpu_freq(dev_priv, val);
> +
> + return ret;
> +}
> +
> +int vlv_freq_opcode(struct drm_i915_private *dev_priv, int val)
> +{
> + int ret = -1;
> +
> + if (IS_CHERRYVIEW(dev_priv->dev))
> + ret = chv_freq_opcode(dev_priv, val);
> + else if (IS_VALLEYVIEW(dev_priv->dev))
> + ret = byt_freq_opcode(dev_priv, val);
> +
> + return ret;
> +}
> +
> void intel_pm_setup(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> --
> 1.9.1
>
> _______________________________________________
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> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
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