From: Ville Syrjälä <ville.syrj...@linux.intel.com> Introduce a new mutex (pps_mutex) to protect the power sequencer state. For now this state includes want_panel_vdd as well as the power sequencer registers.
We need a single mutex (as opposed to per port) because later on we will need to deal with VLV/CHV which have multiple power sequencer which can be reassigned to different ports. Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 3 ++ drivers/gpu/drm/i915/intel_display.c | 2 + drivers/gpu/drm/i915/intel_dp.c | 97 +++++++++++++++++++++++++++++++----- 3 files changed, 90 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 4754328..8684898 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1501,6 +1501,9 @@ struct drm_i915_private { /* LVDS info */ bool no_aux_handshake; + /* protects panel power sequencer state */ + struct mutex pps_mutex; + struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume 965 */ int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */ int num_fence_regs; /* 8 on pre-965, 16 otherwise */ diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 3f8e037..04c0e5d 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -12437,6 +12437,8 @@ static void intel_init_display(struct drm_device *dev) } intel_panel_init_backlight_funcs(dev); + + mutex_init(&dev_priv->pps_mutex); } /* diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index 7ae9a9a..556e4de 100644 --- a/drivers/gpu/drm/i915/intel_dp.c +++ b/drivers/gpu/drm/i915/intel_dp.c @@ -300,6 +300,8 @@ vlv_power_sequencer_pipe(struct intel_dp *intel_dp) enum port port = intel_dig_port->port; enum pipe pipe; + lockdep_assert_held(&dev_priv->pps_mutex); + /* modeset should have pipe */ if (crtc) return to_intel_crtc(crtc)->pipe; @@ -352,6 +354,8 @@ static int edp_notify_handler(struct notifier_block *this, unsigned long code, if (!IS_VALLEYVIEW(dev) || !is_edp(intel_dp) || code != SYS_RESTART) return 0; + mutex_lock(&dev_priv->pps_mutex); + pipe = vlv_power_sequencer_pipe(intel_dp); pp_ctrl_reg = VLV_PIPE_PP_CONTROL(pipe); @@ -364,6 +368,8 @@ static int edp_notify_handler(struct notifier_block *this, unsigned long code, I915_WRITE(pp_ctrl_reg, PANEL_UNLOCK_REGS | PANEL_POWER_OFF); msleep(intel_dp->panel_power_cycle_delay); + mutex_unlock(&dev_priv->pps_mutex); + return 0; } @@ -372,6 +378,8 @@ static bool edp_have_panel_power(struct intel_dp *intel_dp) struct drm_device *dev = intel_dp_to_dev(intel_dp); struct drm_i915_private *dev_priv = dev->dev_private; + lockdep_assert_held(&dev_priv->pps_mutex); + return (I915_READ(_pp_stat_reg(intel_dp)) & PP_ON) != 0; } @@ -383,6 +391,8 @@ static bool edp_have_panel_vdd(struct intel_dp *intel_dp) struct intel_encoder *intel_encoder = &intel_dig_port->base; enum intel_display_power_domain power_domain; + lockdep_assert_held(&dev_priv->pps_mutex); + power_domain = intel_display_port_power_domain(intel_encoder); return intel_display_power_enabled(dev_priv, power_domain) && (I915_READ(_pp_ctrl_reg(intel_dp)) & EDP_FORCE_VDD) != 0; @@ -533,6 +543,8 @@ intel_dp_aux_ch(struct intel_dp *intel_dp, bool has_aux_irq = HAS_AUX_IRQ(dev); bool vdd; + mutex_lock(&dev_priv->pps_mutex); + /* * We will be called with VDD already enabled for dpcd/edid/oui reads. * In such cases we want to leave VDD enabled and it's up to upper layers @@ -648,6 +660,8 @@ out: if (vdd) edp_panel_vdd_off(intel_dp, false); + mutex_unlock(&dev_priv->pps_mutex); + return ret; } @@ -1102,6 +1116,8 @@ static void wait_panel_status(struct intel_dp *intel_dp, struct drm_i915_private *dev_priv = dev->dev_private; u32 pp_stat_reg, pp_ctrl_reg; + lockdep_assert_held(&dev_priv->pps_mutex); + pp_stat_reg = _pp_stat_reg(intel_dp); pp_ctrl_reg = _pp_ctrl_reg(intel_dp); @@ -1165,6 +1181,8 @@ static u32 ironlake_get_pp_control(struct intel_dp *intel_dp) struct drm_i915_private *dev_priv = dev->dev_private; u32 control; + lockdep_assert_held(&dev_priv->pps_mutex); + control = I915_READ(_pp_ctrl_reg(intel_dp)); control &= ~PANEL_UNLOCK_MASK; control |= PANEL_UNLOCK_REGS; @@ -1182,6 +1200,8 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp) u32 pp_stat_reg, pp_ctrl_reg; bool need_to_disable = !intel_dp->want_panel_vdd; + lockdep_assert_held(&dev_priv->pps_mutex); + if (!is_edp(intel_dp)) return false; @@ -1221,12 +1241,16 @@ static bool edp_panel_vdd_on(struct intel_dp *intel_dp) void intel_edp_panel_vdd_on(struct intel_dp *intel_dp) { + struct drm_i915_private *dev_priv = + intel_dp_to_dev(intel_dp)->dev_private; bool vdd; if (!is_edp(intel_dp)) return; + mutex_lock(&dev_priv->pps_mutex); vdd = edp_panel_vdd_on(intel_dp); + mutex_unlock(&dev_priv->pps_mutex); WARN(!vdd, "eDP VDD already requested on\n"); } @@ -1242,7 +1266,7 @@ static void edp_panel_vdd_off_sync(struct intel_dp *intel_dp) u32 pp; u32 pp_stat_reg, pp_ctrl_reg; - WARN_ON(!drm_modeset_is_locked(&dev->mode_config.connection_mutex)); + lockdep_assert_held(&dev_priv->pps_mutex); WARN_ON(intel_dp->want_panel_vdd); @@ -1275,12 +1299,13 @@ static void edp_panel_vdd_work(struct work_struct *__work) { struct intel_dp *intel_dp = container_of(to_delayed_work(__work), struct intel_dp, panel_vdd_work); - struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = + intel_dp_to_dev(intel_dp)->dev_private; - drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + mutex_lock(&dev_priv->pps_mutex); if (!intel_dp->want_panel_vdd) edp_panel_vdd_off_sync(intel_dp); - drm_modeset_unlock(&dev->mode_config.connection_mutex); + mutex_unlock(&dev_priv->pps_mutex); } static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) @@ -1298,6 +1323,11 @@ static void edp_panel_vdd_schedule_off(struct intel_dp *intel_dp) static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) { + struct drm_i915_private *dev_priv = + intel_dp_to_dev(intel_dp)->dev_private; + + lockdep_assert_held(&dev_priv->pps_mutex); + if (!is_edp(intel_dp)) return; @@ -1313,7 +1343,15 @@ static void edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) static void intel_edp_panel_vdd_off(struct intel_dp *intel_dp, bool sync) { - return edp_panel_vdd_off(intel_dp, sync); + struct drm_i915_private *dev_priv = + intel_dp_to_dev(intel_dp)->dev_private; + + if (!is_edp(intel_dp)) + return; + + mutex_lock(&dev_priv->pps_mutex); + edp_panel_vdd_off(intel_dp, sync); + mutex_unlock(&dev_priv->pps_mutex); } void intel_edp_panel_on(struct intel_dp *intel_dp) @@ -1328,9 +1366,11 @@ void intel_edp_panel_on(struct intel_dp *intel_dp) DRM_DEBUG_KMS("Turn eDP power on\n"); + mutex_lock(&dev_priv->pps_mutex); + if (edp_have_panel_power(intel_dp)) { DRM_DEBUG_KMS("eDP power already on\n"); - return; + goto out; } wait_panel_power_cycle(intel_dp); @@ -1359,6 +1399,9 @@ void intel_edp_panel_on(struct intel_dp *intel_dp) I915_WRITE(pp_ctrl_reg, pp); POSTING_READ(pp_ctrl_reg); } + + out: + mutex_unlock(&dev_priv->pps_mutex); } void intel_edp_panel_off(struct intel_dp *intel_dp) @@ -1376,6 +1419,8 @@ void intel_edp_panel_off(struct intel_dp *intel_dp) DRM_DEBUG_KMS("Turn eDP power off\n"); + mutex_lock(&dev_priv->pps_mutex); + WARN(!intel_dp->want_panel_vdd, "Need VDD to turn off panel\n"); pp = ironlake_get_pp_control(intel_dp); @@ -1397,6 +1442,8 @@ void intel_edp_panel_off(struct intel_dp *intel_dp) /* We got a reference when we enabled the VDD. */ power_domain = intel_display_port_power_domain(intel_encoder); intel_display_power_put(dev_priv, power_domain); + + mutex_unlock(&dev_priv->pps_mutex); } void intel_edp_backlight_on(struct intel_dp *intel_dp) @@ -1421,6 +1468,9 @@ void intel_edp_backlight_on(struct intel_dp *intel_dp) * allowing it to appear. */ wait_backlight_on(intel_dp); + + mutex_lock(&dev_priv->pps_mutex); + pp = ironlake_get_pp_control(intel_dp); pp |= EDP_BLC_ENABLE; @@ -1428,6 +1478,8 @@ void intel_edp_backlight_on(struct intel_dp *intel_dp) I915_WRITE(pp_ctrl_reg, pp); POSTING_READ(pp_ctrl_reg); + + mutex_unlock(&dev_priv->pps_mutex); } void intel_edp_backlight_off(struct intel_dp *intel_dp) @@ -1440,6 +1492,8 @@ void intel_edp_backlight_off(struct intel_dp *intel_dp) if (!is_edp(intel_dp)) return; + mutex_lock(&dev_priv->pps_mutex); + DRM_DEBUG_KMS("\n"); pp = ironlake_get_pp_control(intel_dp); pp &= ~EDP_BLC_ENABLE; @@ -1448,8 +1502,10 @@ void intel_edp_backlight_off(struct intel_dp *intel_dp) I915_WRITE(pp_ctrl_reg, pp); POSTING_READ(pp_ctrl_reg); - intel_dp->last_backlight_off = jiffies; + mutex_unlock(&dev_priv->pps_mutex); + + intel_dp->last_backlight_off = jiffies; edp_wait_backlight_off(intel_dp); intel_panel_disable_backlight(intel_dp->attached_connector); @@ -2182,9 +2238,11 @@ static void vlv_pre_enable_dp(struct intel_encoder *encoder) if (is_edp(intel_dp)) { /* init power sequencer on this pipe and port */ + mutex_lock(&dev_priv->pps_mutex); intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, &power_seq); + mutex_unlock(&dev_priv->pps_mutex); } intel_enable_dp(encoder); @@ -2284,9 +2342,11 @@ static void chv_pre_enable_dp(struct intel_encoder *encoder) if (is_edp(intel_dp)) { /* init power sequencer on this pipe and port */ + mutex_lock(&dev_priv->pps_mutex); intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, &power_seq); + mutex_unlock(&dev_priv->pps_mutex); } intel_enable_dp(encoder); @@ -4024,15 +4084,16 @@ void intel_dp_encoder_destroy(struct drm_encoder *encoder) struct intel_digital_port *intel_dig_port = enc_to_dig_port(encoder); struct intel_dp *intel_dp = &intel_dig_port->dp; struct drm_device *dev = intel_dp_to_dev(intel_dp); + struct drm_i915_private *dev_priv = dev->dev_private; drm_dp_aux_unregister(&intel_dp->aux); intel_dp_mst_encoder_cleanup(intel_dig_port); drm_encoder_cleanup(encoder); if (is_edp(intel_dp)) { cancel_delayed_work_sync(&intel_dp->panel_vdd_work); - drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + mutex_lock(&dev_priv->pps_mutex); edp_panel_vdd_off_sync(intel_dp); - drm_modeset_unlock(&dev->mode_config.connection_mutex); + mutex_unlock(&dev_priv->pps_mutex); if (intel_dp->edp_notifier.notifier_call) { unregister_reboot_notifier(&intel_dp->edp_notifier); intel_dp->edp_notifier.notifier_call = NULL; @@ -4210,6 +4271,8 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev, u32 pp_on, pp_off, pp_div, pp; int pp_ctrl_reg, pp_on_reg, pp_off_reg, pp_div_reg; + lockdep_assert_held(&dev_priv->pps_mutex); + if (HAS_PCH_SPLIT(dev)) { pp_ctrl_reg = PCH_PP_CONTROL; pp_on_reg = PCH_PP_ON_DELAYS; @@ -4311,6 +4374,8 @@ intel_dp_init_panel_power_sequencer_registers(struct drm_device *dev, int pp_on_reg, pp_off_reg, pp_div_reg; enum port port = dp_to_dig_port(intel_dp)->port; + lockdep_assert_held(&dev_priv->pps_mutex); + if (HAS_PCH_SPLIT(dev)) { pp_on_reg = PCH_PP_ON_DELAYS; pp_off_reg = PCH_PP_OFF_DELAYS; @@ -4503,9 +4568,11 @@ void intel_edp_panel_vdd_sanitize(struct intel_encoder *intel_encoder) if (intel_encoder->type != INTEL_OUTPUT_EDP) return; + mutex_lock(&dev_priv->pps_mutex); + intel_dp = enc_to_intel_dp(&intel_encoder->base); if (!edp_have_panel_vdd(intel_dp)) - return; + goto out; /* * The VDD bit needs a power domain reference, so if the bit is * already enabled when we boot or resume, grab this reference and @@ -4517,6 +4584,8 @@ void intel_edp_panel_vdd_sanitize(struct intel_encoder *intel_encoder) intel_display_power_get(dev_priv, power_domain); edp_panel_vdd_schedule_off(intel_dp); + out: + mutex_unlock(&dev_priv->pps_mutex); } static bool intel_edp_init_connector(struct intel_dp *intel_dp, @@ -4558,7 +4627,9 @@ static bool intel_edp_init_connector(struct intel_dp *intel_dp, } /* We now know it's not a ghost, init power sequence regs. */ + mutex_lock(&dev_priv->pps_mutex); intel_dp_init_panel_power_sequencer_registers(dev, intel_dp, power_seq); + mutex_unlock(&dev_priv->pps_mutex); mutex_lock(&dev->mode_config.mutex); edid = drm_get_edid(connector, &intel_dp->aux.ddc); @@ -4690,8 +4761,10 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, } if (is_edp(intel_dp)) { + mutex_lock(&dev_priv->pps_mutex); intel_dp_init_panel_power_timestamps(intel_dp); intel_dp_init_panel_power_sequencer(dev, intel_dp, &power_seq); + mutex_unlock(&dev_priv->pps_mutex); } intel_dp_aux_init(intel_dp, intel_connector); @@ -4707,9 +4780,9 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, drm_dp_aux_unregister(&intel_dp->aux); if (is_edp(intel_dp)) { cancel_delayed_work_sync(&intel_dp->panel_vdd_work); - drm_modeset_lock(&dev->mode_config.connection_mutex, NULL); + mutex_lock(&dev_priv->pps_mutex); edp_panel_vdd_off_sync(intel_dp); - drm_modeset_unlock(&dev->mode_config.connection_mutex); + mutex_unlock(&dev_priv->pps_mutex); } drm_connector_unregister(connector); drm_connector_cleanup(connector); -- 1.8.5.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx