--- lib/media_fill_gen7.c | 8 ++++---- lib/media_fill_gen8.c | 8 ++++---- lib/media_fill_gen8lp.c | 8 ++++---- lib/rendercopy_gen6.c | 4 ++-- lib/rendercopy_gen7.c | 8 ++++---- lib/rendercopy_gen8.c | 10 +++++----- 6 files changed, 23 insertions(+), 23 deletions(-)
diff --git a/lib/media_fill_gen7.c b/lib/media_fill_gen7.c index 82c34692a3d8..5a23b7d323c1 100644 --- a/lib/media_fill_gen7.c +++ b/lib/media_fill_gen7.c @@ -67,7 +67,7 @@ gen7_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); - assert(ret == 0); + igt_assert(ret == 0); } static uint32_t @@ -118,7 +118,7 @@ gen7_fill_surface_state(struct intel_batchbuffer *batch, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); - assert(ret == 0); + igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; @@ -330,7 +330,7 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch, curbe_buffer = gen7_fill_curbe_buffer_data(batch, color); interface_descriptor = gen7_fill_interface_descriptor(batch, dst); - assert(batch->ptr < &batch->buffer[4095]); + igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; @@ -348,7 +348,7 @@ gen7_media_fillfunc(struct intel_batchbuffer *batch, OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); - assert(batch_end < BATCH_STATE_SPLIT); + igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); diff --git a/lib/media_fill_gen8.c b/lib/media_fill_gen8.c index 54309d59f52a..3ca1bfa7c2a8 100644 --- a/lib/media_fill_gen8.c +++ b/lib/media_fill_gen8.c @@ -67,7 +67,7 @@ gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); - assert(ret == 0); + igt_assert(ret == 0); } static uint32_t @@ -121,7 +121,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); - assert(ret == 0); + igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; @@ -353,7 +353,7 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch, curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst); - assert(batch->ptr < &batch->buffer[4095]); + igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; @@ -371,7 +371,7 @@ gen8_media_fillfunc(struct intel_batchbuffer *batch, OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); - assert(batch_end < BATCH_STATE_SPLIT); + igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); diff --git a/lib/media_fill_gen8lp.c b/lib/media_fill_gen8lp.c index 74dc573cf247..7fa37a89351e 100644 --- a/lib/media_fill_gen8lp.c +++ b/lib/media_fill_gen8lp.c @@ -67,7 +67,7 @@ gen8_render_flush(struct intel_batchbuffer *batch, uint32_t batch_end) if (ret == 0) ret = drm_intel_bo_mrb_exec(batch->bo, batch_end, NULL, 0, 0, 0); - assert(ret == 0); + igt_assert(ret == 0); } static uint32_t @@ -121,7 +121,7 @@ gen8_fill_surface_state(struct intel_batchbuffer *batch, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); - assert(ret == 0); + igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; @@ -345,7 +345,7 @@ gen8lp_media_fillfunc(struct intel_batchbuffer *batch, curbe_buffer = gen8_fill_curbe_buffer_data(batch, color); interface_descriptor = gen8_fill_interface_descriptor(batch, dst); - assert(batch->ptr < &batch->buffer[4095]); + igt_assert(batch->ptr < &batch->buffer[4095]); /* media pipeline */ batch->ptr = batch->buffer; @@ -363,7 +363,7 @@ gen8lp_media_fillfunc(struct intel_batchbuffer *batch, OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); - assert(batch_end < BATCH_STATE_SPLIT); + igt_assert(batch_end < BATCH_STATE_SPLIT); gen8_render_flush(batch, batch_end); intel_batchbuffer_reset(batch); diff --git a/lib/rendercopy_gen6.c b/lib/rendercopy_gen6.c index afe7562a0331..8c24cf8adf84 100644 --- a/lib/rendercopy_gen6.c +++ b/lib/rendercopy_gen6.c @@ -102,7 +102,7 @@ gen6_render_flush(struct intel_batchbuffer *batch, if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); - assert(ret == 0); + igt_assert(ret == 0); } static uint32_t @@ -132,7 +132,7 @@ gen6_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); - assert(ret == 0); + igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; diff --git a/lib/rendercopy_gen7.c b/lib/rendercopy_gen7.c index 2932f1ef630c..3b92406148c0 100644 --- a/lib/rendercopy_gen7.c +++ b/lib/rendercopy_gen7.c @@ -77,14 +77,14 @@ gen7_render_flush(struct intel_batchbuffer *batch, if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); - assert(ret == 0); + igt_assert(ret == 0); } static uint32_t gen7_tiling_bits(uint32_t tiling) { switch (tiling) { - default: assert(0); + default: igt_assert(0); case I915_TILING_NONE: return 0; case I915_TILING_X: return GEN7_SURFACE_TILED; case I915_TILING_Y: return GEN7_SURFACE_TILED | GEN7_SURFACE_TILED_Y; @@ -128,7 +128,7 @@ gen7_bind_buf(struct intel_batchbuffer *batch, batch_offset(batch, ss) + 4, buf->bo, 0, read_domain, write_domain); - assert(ret == 0); + igt_assert(ret == 0); return batch_offset(batch, ss); } @@ -579,7 +579,7 @@ void gen7_render_copyfunc(struct intel_batchbuffer *batch, batch_end = batch->ptr - batch->buffer; batch_end = ALIGN(batch_end, 8); - assert(batch_end < BATCH_STATE_SPLIT); + igt_assert(batch_end < BATCH_STATE_SPLIT); gen7_render_flush(batch, context, batch_end); intel_batchbuffer_reset(batch); diff --git a/lib/rendercopy_gen8.c b/lib/rendercopy_gen8.c index ff0b0c83e159..6d196316f4dc 100644 --- a/lib/rendercopy_gen8.c +++ b/lib/rendercopy_gen8.c @@ -107,7 +107,7 @@ static void annotation_add_state(struct annotations_context *ctx, uint32_t start_offset, size_t size) { - assert(ctx->index < MAX_ANNOTATIONS); + igt_assert(ctx->index < MAX_ANNOTATIONS); add_annotation(&ctx->annotations[ctx->index++], AUB_TRACE_TYPE_NOTYPE, 0, @@ -174,7 +174,7 @@ gen6_render_flush(struct intel_batchbuffer *batch, if (ret == 0) ret = drm_intel_gem_bo_context_exec(batch->bo, context, batch_end, 0); - assert(ret == 0); + igt_assert(ret == 0); } /* Mostly copy+paste from gen6, except height, width, pitch moved */ @@ -213,7 +213,7 @@ gen8_bind_buf(struct intel_batchbuffer *batch, struct igt_buf *buf, batch_offset(batch, ss) + 8 * 4, buf->bo, 0, read_domain, write_domain); - assert(ret == 0); + igt_assert(ret == 0); ss->ss2.height = igt_buf_height(buf) - 1; ss->ss2.width = igt_buf_width(buf) - 1; @@ -944,7 +944,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch, scissor_state = gen6_create_scissor_rect(batch); /* TODO: theree is other state which isn't setup */ - assert(batch->ptr < &batch->buffer[4095]); + igt_assert(batch->ptr < &batch->buffer[4095]); batch->ptr = batch->buffer; @@ -1007,7 +1007,7 @@ void gen8_render_copyfunc(struct intel_batchbuffer *batch, OUT_BATCH(MI_BATCH_BUFFER_END); batch_end = batch_align(batch, 8); - assert(batch_end < BATCH_STATE_SPLIT); + igt_assert(batch_end < BATCH_STATE_SPLIT); annotation_add_batch(&aub_annotations, batch_end); dump_batch(batch); -- 2.0.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx