Write HWS_PGA address even in execlists mode as the global hardware status page is still required. This address was previously uninitialized and HWSP writes would clobber whatever buffer happened to reside at GGTT address 0.
v2: Break out hardware status page setup into a separate function. Issue: VIZ-2020 Signed-off-by: Thomas Daniel <thomas.dan...@intel.com> --- drivers/gpu/drm/i915/intel_lrc.c | 34 ++++++++++++++++++++++++++-------- 1 file changed, 26 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index 87ce445..6b8bf0d 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1657,6 +1657,27 @@ static uint32_t get_lr_context_size(struct intel_engine_cs *ring) return ret; } +static int lrc_setup_hardware_status_page(struct intel_engine_cs *ring, + struct drm_i915_gem_object *default_ctx_obj) +{ + struct drm_i915_private *dev_priv = ring->dev->dev_private; + + /* The status page is offset 0 from the default context object + * in LRC mode. */ + ring->status_page.gfx_addr = i915_gem_obj_ggtt_offset(default_ctx_obj); + ring->status_page.page_addr = + kmap(sg_page(default_ctx_obj->pages->sgl)); + if (ring->status_page.page_addr == NULL) + return -ENOMEM; + ring->status_page.obj = default_ctx_obj; + + I915_WRITE(RING_HWS_PGA(ring->mmio_base), + (u32)ring->status_page.gfx_addr); + POSTING_READ(RING_HWS_PGA(ring->mmio_base)); + + return 0; +} + /** * intel_lr_context_deferred_create() - create the LRC specific bits of a context * @ctx: LR context to create. @@ -1742,14 +1763,11 @@ int intel_lr_context_deferred_create(struct intel_context *ctx, ctx->engine[ring->id].state = ctx_obj; if (ctx == ring->default_context) { - /* The status page is offset 0 from the default context object - * in LRC mode. */ - ring->status_page.gfx_addr = i915_gem_obj_ggtt_offset(ctx_obj); - ring->status_page.page_addr = - kmap(sg_page(ctx_obj->pages->sgl)); - if (ring->status_page.page_addr == NULL) - return -ENOMEM; - ring->status_page.obj = ctx_obj; + ret = lrc_setup_hardware_status_page(ring, ctx_obj); + if (ret) { + DRM_ERROR("Failed to setup hardware status page\n"); + goto error; + } } if (ring->id == RCS && !ctx->rcs_initialized) { -- 1.7.9.5 _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx