From: Ben Widawsky <benjamin.widaw...@intel.com>
These values are never quite useful for dynamic allocations of the page
tables. Getting rid of them will help prevent later confusion.
Signed-off-by: Ben Widawsky <b...@bwidawsk.net>
Signed-off-by: Michel Thierry <michel.thie...@intel.com>
---
drivers/gpu/drm/i915/i915_debugfs.c | 2 --
drivers/gpu/drm/i915/i915_gem_gtt.c | 68 ++++++++++++-------------------------
drivers/gpu/drm/i915/i915_gem_gtt.h | 7 ++--
3 files changed, 27 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
b/drivers/gpu/drm/i915/i915_debugfs.c
index 0f63076..b00760b 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2117,8 +2117,6 @@ static void gen8_ppgtt_info(struct seq_file *m, struct
drm_device *dev)
if (!ppgtt)
return;
- seq_printf(m, "Page directories: %d\n", ppgtt->num_pd_pages);
- seq_printf(m, "Page tables: %d\n", ppgtt->num_pd_entries);
for_each_ring(ring, dev_priv, unused) {
seq_printf(m, "%s\n", ring->name);
for (i = 0; i < 4; i++) {
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
b/drivers/gpu/drm/i915/i915_gem_gtt.c
index bd6cb2f..c40db0e 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -607,7 +607,7 @@ static void gen8_ppgtt_unmap_pages(struct i915_hw_ppgtt
*ppgtt)
struct pci_dev *hwdev = ppgtt->base.dev->pdev;
int i, j;
- for (i = 0; i < ppgtt->num_pd_pages; i++) {
+ for (i = 0; i < GEN8_PDES_PER_PAGE; i++) {
/* TODO: In the future we'll support sparse mappings, so this
* will have to change. */
if (!ppgtt->pdp.pagedir[i]->daddr)
@@ -688,21 +688,13 @@ static int gen8_ppgtt_alloc_pagedirs(struct
i915_pagedirpo *pdp,
pdp->pagedir[pdpe] = alloc_pd_single();
if (IS_ERR(ppgtt->pdp.pagedir[pdpe]))
goto unwind_out;
-
- ppgtt->num_pd_pages++;
}
- BUG_ON(ppgtt->num_pd_pages > GEN8_LEGACY_PDPES);
-
return 0;
unwind_out:
- while (pdpe--) {
+ while (pdpe--)
free_pd_single(ppgtt->pdp.pagedir[pdpe]);
- ppgtt->num_pd_pages--;
- }
-
- WARN_ON(ppgtt->num_pd_pages);
return -ENOMEM;
}
@@ -725,12 +717,8 @@ static int gen8_ppgtt_alloc(struct i915_hw_ppgtt *ppgtt,
ppgtt->base.dev);
if (ret)
goto err_out;
-
- ppgtt->num_pd_entries += GEN8_PDES_PER_PAGE;
}
- BUG_ON(pdpe > ppgtt->num_pd_pages);
-
return 0;
/* TODO: Check this for all cases */
@@ -792,7 +780,6 @@ static int gen8_ppgtt_setup_page_tables(struct
i915_hw_ppgtt *ppgtt,
static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt, uint64_t size)
{
const int max_pdp = DIV_ROUND_UP(size, 1 << 30);
- const int min_pt_pages = GEN8_PDES_PER_PAGE * max_pdp;
int i, j, ret;
if (size % (1<<30))
@@ -855,11 +842,6 @@ static int gen8_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
uint64_t size)
ppgtt->base.insert_entries = gen8_ppgtt_insert_entries;
ppgtt->base.cleanup = gen8_ppgtt_cleanup;
- DRM_DEBUG_DRIVER("Allocated %d pages for page directories (%d
wasted)\n",
- ppgtt->num_pd_pages, ppgtt->num_pd_pages - max_pdp);
- DRM_DEBUG_DRIVER("Allocated %d pages for page tables (%lld wasted)\n",
- ppgtt->num_pd_entries,
- (ppgtt->num_pd_entries - min_pt_pages) + size %
(1<<30));
return 0;
bail:
@@ -870,26 +852,20 @@ bail:
static void gen6_dump_ppgtt(struct i915_hw_ppgtt *ppgtt, struct seq_file *m)
{
- struct drm_i915_private *dev_priv = ppgtt->base.dev->dev_private;
struct i915_address_space *vm = &ppgtt->base;
- gen6_gtt_pte_t __iomem *pd_addr;
+ struct i915_pagetab *unused;
gen6_gtt_pte_t scratch_pte;
uint32_t pd_entry;
- int pte, pde;
+ uint32_t pte, pde, temp;
+ uint32_t start = ppgtt->base.start, length = ppgtt->base.total;
scratch_pte = vm->pte_encode(vm->scratch.addr, I915_CACHE_LLC, true, 0);
- pd_addr = (gen6_gtt_pte_t __iomem *)dev_priv->gtt.gsm +
- ppgtt->pd.pd_offset / sizeof(gen6_gtt_pte_t);
-
- seq_printf(m, " VM %p (pd_offset %x-%x):\n", vm,
- ppgtt->pd.pd_offset,
- ppgtt->pd.pd_offset + ppgtt->num_pd_entries);
- for (pde = 0; pde < ppgtt->num_pd_entries; pde++) {
+ gen6_for_each_pde(unused, &ppgtt->pd, start, length, temp, pde) {
u32 expected;
gen6_gtt_pte_t *pt_vaddr;
dma_addr_t pt_addr = ppgtt->pd.page_tables[pde]->daddr;
- pd_entry = readl(pd_addr + pde);
+ pd_entry = readl(ppgtt->pd_addr + pde);
expected = (GEN6_PDE_ADDR_ENCODE(pt_addr) | GEN6_PDE_VALID);
if (pd_entry != expected)
@@ -1162,12 +1138,15 @@ static void gen6_ppgtt_insert_entries(struct
i915_address_space *vm,
static void gen6_ppgtt_unmap_pages(struct i915_hw_ppgtt *ppgtt)
{
- int i;
+ struct i915_pagetab *pt;
+ uint32_t pde;
- for (i = 0; i < ppgtt->num_pd_entries; i++)
- pci_unmap_page(ppgtt->base.dev->pdev,
- ppgtt->pd.page_tables[i]->daddr,
- 4096, PCI_DMA_BIDIRECTIONAL);
+ gen6_for_all_pdes(pt, ppgtt, pde) {
+ if (pt != ppgtt->scratch_pt) /* MT check if needed this if */
+ pci_unmap_page(ppgtt->base.dev->pdev,
+ pt->daddr,
+ 4096, PCI_DMA_BIDIRECTIONAL);
+ }
}
/* PDE TLBs are a pain invalidate pre GEN8. It requires a context reload. If we
@@ -1308,12 +1287,12 @@ static void gen6_teardown_va_range(struct
i915_address_space *vm,
static void gen6_ppgtt_free(struct i915_hw_ppgtt *ppgtt)
{
- int i;
+ struct i915_pagetab *pt;
+ uint32_t pde;
- for (i = 0; i < ppgtt->num_pd_entries; i++) {
- struct i915_pagetab *pt = ppgtt->pd.page_tables[i];
+ gen6_for_all_pdes(pt, ppgtt, pde) {
if (pt != ppgtt->scratch_pt)
- free_pt_single(ppgtt->pd.page_tables[i],
ppgtt->base.dev);
+ free_pt_single(pt, ppgtt->base.dev);
}
/* Consider putting this as part of pd free. */
@@ -1373,7 +1352,6 @@ alloc:
if (ppgtt->node.start < dev_priv->gtt.mappable_end)
DRM_DEBUG("Forced to use aperture for PDEs\n");
- ppgtt->num_pd_entries = GEN6_PPGTT_PD_ENTRIES;
return 0;
err_out:
@@ -1392,9 +1370,7 @@ static int gen6_ppgtt_alloc(struct i915_hw_ppgtt *ppgtt,
bool preallocate_pt)
if (!preallocate_pt)
return 0;
- ret = alloc_pt_range(&ppgtt->pd, 0, ppgtt->num_pd_entries,
- ppgtt->base.dev);
-
+ ret = alloc_pt_range(&ppgtt->pd, 0, GEN6_PPGTT_PD_ENTRIES,
ppgtt->base.dev);
if (ret) {
free_pt_scratch(ppgtt->scratch_pt, ppgtt->base.dev);
drm_mm_remove_node(&ppgtt->node);
@@ -1440,7 +1416,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt,
bool aliasing)
ppgtt->base.insert_entries = gen6_ppgtt_insert_entries;
ppgtt->base.cleanup = gen6_ppgtt_cleanup;
ppgtt->base.start = 0;
- ppgtt->base.total = ppgtt->num_pd_entries * I915_PPGTT_PT_ENTRIES *
PAGE_SIZE;
+ ppgtt->base.total = GEN6_PPGTT_PD_ENTRIES * I915_PPGTT_PT_ENTRIES *
PAGE_SIZE;
ppgtt->debug_dump = gen6_dump_ppgtt;
ppgtt->pd.pd_offset =
@@ -1748,7 +1724,7 @@ void i915_gem_restore_gtt_mappings(struct drm_device *dev)
if (i915_is_ggtt(vm))
ppgtt = dev_priv->mm.aliasing_ppgtt;
- gen6_write_page_range(dev_priv, &ppgtt->pd, 0,
ppgtt->num_pd_entries);
+ gen6_write_page_range(dev_priv, &ppgtt->pd, 0,
GEN6_PPGTT_PD_ENTRIES);
}
i915_ggtt_flush(dev_priv);
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h
b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 0cf4f6d..4c50d87 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -276,8 +276,6 @@ struct i915_hw_ppgtt {
struct i915_address_space base;
struct kref ref;
struct drm_mm_node node;
- unsigned num_pd_entries;
- unsigned num_pd_pages; /* gen8+ */
union {
struct i915_pagedirpo pdp;
struct i915_pagedir pd;
@@ -343,6 +341,11 @@ struct i915_gtt {
temp = min(temp, (unsigned)length), \
start += temp, length -= temp)
+#define gen6_for_all_pdes(pt, ppgtt, iter) \
+ for (iter = 0, pt = ppgtt->pd.page_tables[iter];
\
+ iter < gen6_pde_index(ppgtt->base.total); \
+ pt = ppgtt->pd.page_tables[++iter])
+
static inline uint32_t i915_pte_index(uint64_t address, uint32_t pde_shift)
{
const uint32_t mask = NUM_PTE(pde_shift) - 1;
--
2.1.1
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