On Thu, Feb 26, 2015 at 06:19:45PM +0530, akash.g...@intel.com wrote:
> From: Akash Goel <akash.g...@intel.com>
>
> Added support for SKL in the act_freq_mhz_show sysfs function
>
> Signed-off-by: Akash Goel <akash.g...@intel.com>
Again required a bit of mail juggling to double chekc the definition,
but looks correct.
Reviewed-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
> ---
> drivers/gpu/drm/i915/i915_sysfs.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_sysfs.c
> b/drivers/gpu/drm/i915/i915_sysfs.c
> index 186ab95..57e1186 100644
> --- a/drivers/gpu/drm/i915/i915_sysfs.c
> +++ b/drivers/gpu/drm/i915/i915_sysfs.c
> @@ -300,7 +300,9 @@ static ssize_t gt_act_freq_mhz_show(struct device *kdev,
> ret = intel_gpu_freq(dev_priv, (freq >> 8) & 0xff);
> } else {
> u32 rpstat = I915_READ(GEN6_RPSTAT1);
> - if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> + if (IS_GEN9(dev_priv))
> + ret = (rpstat & GEN9_CAGF_MASK) >> GEN9_CAGF_SHIFT;
> + else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv))
> ret = (rpstat & HSW_CAGF_MASK) >> HSW_CAGF_SHIFT;
> else
> ret = (rpstat & GEN6_CAGF_MASK) >> GEN6_CAGF_SHIFT;
> --
> 1.9.2
>
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--
Ville Syrjälä
Intel OTC
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