The offset doesn't change once the context is pinned, but the lookup
turns out to be comparatively costly as it gets repeated for every
request.
Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_lrc.c | 22 ++++++++++++----------
drivers/gpu/drm/i915/intel_ringbuffer.h | 1 +
2 files changed, 13 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 80f00feb6bf4..cf00b507a853 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -230,8 +230,8 @@ int intel_sanitize_enable_execlists(struct drm_device *dev,
int enable_execlists
return 0;
}
-static uint32_t execlists_ctx_descriptor(struct intel_engine_cs *ring,
- struct drm_i915_gem_object *ctx_obj)
+static uint32_t execlists_ctx_descriptor(struct intel_engine_cs *engine,
+ uint32_t ggtt_offset)
{
uint32_t desc;
@@ -239,27 +239,28 @@ static uint32_t execlists_ctx_descriptor(struct
intel_engine_cs *ring,
desc |= LEGACY_CONTEXT << GEN8_CTX_MODE_SHIFT;
desc |= GEN8_CTX_L3LLC_COHERENT;
desc |= GEN8_CTX_PRIVILEGE;
- desc |= i915_gem_obj_ggtt_offset(ctx_obj);
+ desc |= ggtt_offset;
/* TODO: WaDisableLiteRestore when we start using semaphore
* signalling between Command Streamers */
/* desc |= GEN8_CTX_FORCE_RESTORE; */
/* WaEnableForceRestoreInCtxtDescForVCS:skl */
- if (IS_GEN9(ring->dev) && INTEL_REVID(ring->dev) <= SKL_REVID_B0 &&
- (ring->id == BCS || ring->id == VCS ||
- ring->id == VECS || ring->id == VCS2))
+ if (IS_GEN9(engine->dev) && INTEL_REVID(engine->dev) <= SKL_REVID_B0 &&
+ (engine->id == BCS || engine->id == VCS ||
+ engine->id == VECS || engine->id == VCS2))
desc |= GEN8_CTX_FORCE_RESTORE;
return desc;
}
-static uint32_t execlists_request_write_tail(struct intel_engine_cs *ring,
+static uint32_t execlists_request_write_tail(struct intel_engine_cs *engine,
struct drm_i915_gem_request *rq)
{
- rq->ctx->engine[ring->id].ringbuf->regs[CTX_RING_TAIL+1] = rq->tail;
- return execlists_ctx_descriptor(ring, rq->ctx->engine[ring->id].state);
+ struct intel_ringbuffer *ring = rq->ctx->engine[engine->id].ringbuf;
+ ring->regs[CTX_RING_TAIL+1] = rq->tail;
+ return execlists_ctx_descriptor(engine, ring->ggtt_offset);
}
static void execlists_submit_pair(struct intel_engine_cs *ring)
@@ -713,7 +714,8 @@ static int intel_lr_context_pin(struct intel_engine_cs
*ring,
if (ret)
goto reset_pin_count;
- if (WARN_ON(i915_gem_obj_ggtt_offset(ctx_obj) & 0xFFFFFFFF00000FFFULL))
{
+ ringbuf->ggtt_offset = i915_gem_obj_ggtt_offset(ctx_obj);
+ if (WARN_ON(ringbuf->ggtt_offset & 0xFFFFFFFF00000FFFULL)) {
ret = -ENODEV;
goto unpin_ctx_obj;
}
diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h
b/drivers/gpu/drm/i915/intel_ringbuffer.h
index 870a1d008db9..1f04b607fbcc 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.h
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.h
@@ -98,6 +98,7 @@ struct intel_ringbuffer {
struct drm_i915_gem_object *obj;
void __iomem *virtual_start;
uint32_t *regs;
+ uint32_t ggtt_offset;
struct intel_engine_cs *ring;
--
2.1.4
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