On Mon, Apr 27, 2015 at 01:41:24PM +0100, Chris Wilson wrote:
> If the client stalls on a congested request, chosen to be 20ms old to
> match throttling, allow the client a free RPS boost.
> 
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/i915_gem.c  |  2 +-
>  drivers/gpu/drm/i915/intel_drv.h |  3 ++-
>  drivers/gpu/drm/i915/intel_pm.c  | 19 +++++++++++++++----
>  3 files changed, 18 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 43ac75834e61..83bccb9f62d6 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -1247,7 +1247,7 @@ int __i915_wait_request(struct drm_i915_gem_request 
> *req,
>               jiffies + nsecs_to_jiffies_timeout((u64)*timeout) : 0;
>  
>       if (INTEL_INFO(dev_priv)->gen >= 6)
> -             gen6_rps_boost(dev_priv, rps);
> +             gen6_rps_boost(dev_priv, rps, req->emitted_jiffies);
>  
>       /* Record current time in case interrupted by signal, or wedged */
>       trace_i915_gem_request_wait_begin(req);
> diff --git a/drivers/gpu/drm/i915/intel_drv.h 
> b/drivers/gpu/drm/i915/intel_drv.h
> index 9eb0a911343a..34cfa61f3321 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1361,7 +1361,8 @@ void gen6_rps_busy(struct drm_i915_private *dev_priv);
>  void gen6_rps_reset_ei(struct drm_i915_private *dev_priv);
>  void gen6_rps_idle(struct drm_i915_private *dev_priv);
>  void gen6_rps_boost(struct drm_i915_private *dev_priv,
> -                 struct intel_rps_client *rps);
> +                 struct intel_rps_client *rps,
> +                 unsigned long submitted);
>  void intel_queue_rps_boost_for_request(struct drm_device *dev,
>                                      struct drm_i915_gem_request *rq);
>  void ilk_wm_get_hw_state(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index dcc52f928650..850e02e1c7eb 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4122,10 +4122,17 @@ void gen6_rps_idle(struct drm_i915_private *dev_priv)
>  }
>  
>  void gen6_rps_boost(struct drm_i915_private *dev_priv,
> -                 struct intel_rps_client *rps)
> +                 struct intel_rps_client *rps,
> +                 unsigned long submitted)
>  {
>       u32 val;
>  
> +     /* Force a RPS boost (and don't count it against the client) if
> +      * the GPU is severely congested.
> +      */
> +     if (rps && time_after(jiffies, submitted + msecs_to_jiffies(20)))

A #define for these 20 ms used both here and in the throttle ioctl would
be neat, just to reinforce the connection. Can you please follow-up with
that patch?
-Daniel

> +             rps = NULL;
> +
>       mutex_lock(&dev_priv->rps.hw_lock);
>       val = dev_priv->rps.max_freq_softlimit;
>       if (dev_priv->rps.enabled &&
> @@ -6825,11 +6832,12 @@ struct request_boost {
>  static void __intel_rps_boost_work(struct work_struct *work)
>  {
>       struct request_boost *boost = container_of(work, struct request_boost, 
> work);
> +     struct drm_i915_gem_request *rq = boost->rq;
>  
> -     if (!i915_gem_request_completed(boost->rq, true))
> -             gen6_rps_boost(to_i915(boost->rq->ring->dev), NULL);
> +     if (!i915_gem_request_completed(rq, true))
> +             gen6_rps_boost(to_i915(rq->ring->dev), 0, rq->emitted_jiffies);
>  
> -     i915_gem_request_unreference__unlocked(boost->rq);
> +     i915_gem_request_unreference__unlocked(rq);
>       kfree(boost);
>  }
>  
> @@ -6841,6 +6849,9 @@ void intel_queue_rps_boost_for_request(struct 
> drm_device *dev,
>       if (rq == NULL || INTEL_INFO(dev)->gen < 6)
>               return;
>  
> +     if (i915_gem_request_completed(rq, true))
> +             return;
> +
>       boost = kmalloc(sizeof(*boost), GFP_ATOMIC);
>       if (boost == NULL)
>               return;
> -- 
> 2.1.4
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to