On Wed, Aug 26, 2015 at 12:55:57PM +0100, Chris Wilson wrote:
> As we mark the preallocated objects as bound, we should also flag them
> correctly as being map-and-fenceable (if appropriate!) so that latter
> users do not get confused and try and rebind the pinned vma in order to
> get a map-and-fenceable binding.
> 
> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk>
> Cc: "Goel, Akash" <akash.g...@intel.com>
> Cc: Daniel Vetter <daniel.vet...@ffwll.ch>
> Cc: Jesse Barnes <jbar...@virtuousgeek.org>
> Cc: sta...@vger.kernel.org

Reviewed-by: Daniel Vetter <daniel.vet...@ffwll.ch>

Jani, can you please pick up both? And some bugzilla references for either
would be great too - Chris?

Oh and does patch 1 fix the execlist resume troubles? Execlist having
bigger contexts might be enough explanations for the apparent regression.

And can we igt patch 1 somehow? E.g. with memory pressure plus doing an
mmap on the legacy fbdev ...
-Daniel

> ---
>  drivers/gpu/drm/i915/i915_drv.h     |  1 +
>  drivers/gpu/drm/i915/i915_gem.c     | 43 
> +++++++++++++++++++++----------------
>  drivers/gpu/drm/i915/i915_gem_gtt.c |  1 +
>  3 files changed, 26 insertions(+), 19 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index 55611d81ec6c..ec731e6db126 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -2798,6 +2798,7 @@ i915_gem_object_ggtt_pin(struct drm_i915_gem_object 
> *obj,
>  
>  int i915_vma_bind(struct i915_vma *vma, enum i915_cache_level cache_level,
>                 u32 flags);
> +void __i915_vma_set_map_and_fenceable(struct i915_vma *vma);
>  int __must_check i915_vma_unbind(struct i915_vma *vma);
>  int i915_gem_object_put_pages(struct drm_i915_gem_object *obj);
>  void i915_gem_release_all_mmaps(struct drm_i915_private *dev_priv);
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 407b6b3576ae..39571e67f9a5 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -3980,6 +3980,29 @@ i915_vma_misplaced(struct i915_vma *vma, uint32_t 
> alignment, uint64_t flags)
>       return false;
>  }
>  
> +void __i915_vma_set_map_and_fenceable(struct i915_vma *vma)
> +{
> +     struct drm_i915_gem_object *obj = vma->obj;
> +     bool mappable, fenceable;
> +     u32 fence_size, fence_alignment;
> +
> +     fence_size = i915_gem_get_gtt_size(obj->base.dev,
> +                                        obj->base.size,
> +                                        obj->tiling_mode);
> +     fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
> +                                                  obj->base.size,
> +                                                  obj->tiling_mode,
> +                                                  true);
> +
> +     fenceable = (vma->node.size == fence_size &&
> +                  (vma->node.start & (fence_alignment - 1)) == 0);
> +
> +     mappable = (vma->node.start + fence_size <=
> +                 to_i915(obj->base.dev)->gtt.mappable_end);
> +
> +     obj->map_and_fenceable = mappable && fenceable;
> +}
> +
>  static int
>  i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
>                      struct i915_address_space *vm,
> @@ -4047,25 +4070,7 @@ i915_gem_object_do_pin(struct drm_i915_gem_object *obj,
>  
>       if (ggtt_view && ggtt_view->type == I915_GGTT_VIEW_NORMAL &&
>           (bound ^ vma->bound) & GLOBAL_BIND) {
> -             bool mappable, fenceable;
> -             u32 fence_size, fence_alignment;
> -
> -             fence_size = i915_gem_get_gtt_size(obj->base.dev,
> -                                                obj->base.size,
> -                                                obj->tiling_mode);
> -             fence_alignment = i915_gem_get_gtt_alignment(obj->base.dev,
> -                                                          obj->base.size,
> -                                                          obj->tiling_mode,
> -                                                          true);
> -
> -             fenceable = (vma->node.size == fence_size &&
> -                          (vma->node.start & (fence_alignment - 1)) == 0);
> -
> -             mappable = (vma->node.start + fence_size <=
> -                         dev_priv->gtt.mappable_end);
> -
> -             obj->map_and_fenceable = mappable && fenceable;
> -
> +             __i915_vma_set_map_and_fenceable(vma);
>               WARN_ON(flags & PIN_MAPPABLE && !obj->map_and_fenceable);
>       }
>  
> diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c 
> b/drivers/gpu/drm/i915/i915_gem_gtt.c
> index 4a76807143b1..112d84c32257 100644
> --- a/drivers/gpu/drm/i915/i915_gem_gtt.c
> +++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
> @@ -2586,6 +2586,7 @@ static int i915_gem_setup_global_gtt(struct drm_device 
> *dev,
>                       return ret;
>               }
>               vma->bound |= GLOBAL_BIND;
> +             __i915_vma_set_map_and_fenceable(vma);
>       }
>  
>       /* Clear any non-preallocated blocks */
> -- 
> 2.5.0
> 

-- 
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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