Apply in common gen9_init_clock_gating() fn and add revid check for bxt.
Cc: Nick Hoath <nicholas.ho...@intel.com>
Signed-off-by: Arun Siluvery <arun.siluv...@linux.intel.com>
---
drivers/gpu/drm/i915/intel_pm.c | 21 ++++++++++-----------
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 920872a..0f6588c 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -63,6 +63,13 @@ static void gen9_init_clock_gating(struct drm_device *dev)
/* WaDisableKillLogic:bxt,skl */
I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |
ECOCHK_DIS_TLB);
+
+ /* WaDisableSDEUnitClockGating:skl,bxt */
+ if ((IS_SKYLAKE(dev) && INTEL_REVID(dev) <= SKL_REVID_B0) ||
+ (IS_BROXTON(dev) && INTEL_REVID(dev) == BXT_REVID_A0)) {
+ I915_WRITE(GEN8_UCGCTL6, (I915_READ(GEN8_UCGCTL6) |
+ GEN8_SDEUNIT_CLOCK_GATE_DISABLE));
+ }
}
static void skl_init_clock_gating(struct drm_device *dev)
@@ -72,13 +79,9 @@ static void skl_init_clock_gating(struct drm_device *dev)
gen9_init_clock_gating(dev);
if (INTEL_REVID(dev) <= SKL_REVID_B0) {
- /*
- * WaDisableSDEUnitClockGating:skl
- * WaSetGAPSunitClckGateDisable:skl
- */
- I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
- GEN8_GAPSUNIT_CLOCK_GATE_DISABLE |
- GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
+ /* WaSetGAPSunitClckGateDisable:skl */
+ I915_WRITE(GEN8_UCGCTL6, (I915_READ(GEN8_UCGCTL6) |
+ GEN8_GAPSUNIT_CLOCK_GATE_DISABLE));
/* WaDisableVFUnitClockGating:skl */
I915_WRITE(GEN6_UCGCTL2, I915_READ(GEN6_UCGCTL2) |
@@ -116,10 +119,6 @@ static void bxt_init_clock_gating(struct drm_device *dev)
gen9_init_clock_gating(dev);
- /* WaDisableSDEUnitClockGating:bxt */
- I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) |
- GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
-
/*
* FIXME:
* GEN8_HDCUNIT_CLOCK_GATE_DISABLE_HDCREQ applies on 3x6 GT SKUs only.
--
1.9.1
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