[Intel-gfx] [PATCH 3/8] drm/i915: Split intel_dp_update_link_train()

[Ander Conselvan de Oliveira]

Separate the bit that writes to DP register in its own function and move
the update of the train_set based on the adjust request to the sink out.
The objective is to split the generic link training logic from the i915
specific part.
---
 drivers/gpu/drm/i915/intel_dp.c | 21 ++++++++++++++-------
 1 file changed, 14 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
index 58efdca..d7988a6 100644
--- a/drivers/gpu/drm/i915/intel_dp.c
+++ b/drivers/gpu/drm/i915/intel_dp.c
@@ -3640,20 +3640,25 @@ intel_dp_reset_link_train(struct intel_dp *intel_dp,
        return intel_dp_set_link_train(intel_dp, dp_train_pat);
 }
 
-static bool
-intel_dp_update_link_train(struct intel_dp *intel_dp,
-                          const uint8_t link_status[DP_LINK_STATUS_SIZE])
+static void
+intel_dp_update_signal_levels(struct intel_dp *intel_dp)
 {
        struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
        struct drm_i915_private *dev_priv =
                to_i915(intel_dig_port->base.base.dev);
-       int ret;
 
-       intel_get_adjust_train(intel_dp, link_status);
        intel_dp_set_signal_levels(intel_dp, &intel_dp->DP);
 
        I915_WRITE(intel_dp->output_reg, intel_dp->DP);
        POSTING_READ(intel_dp->output_reg);
+}
+
+static bool
+intel_dp_update_link_train(struct intel_dp *intel_dp)
+{
+       int ret;
+
+       intel_dp_update_signal_levels(intel_dp);
 
        ret = drm_dp_dpcd_write(&intel_dp->aux, DP_TRAINING_LANE0_SET,
                                intel_dp->train_set, intel_dp->lane_count);
@@ -3796,7 +3801,8 @@ intel_dp_link_training_clock_recovery(struct intel_dp 
*intel_dp)
                voltage = intel_dp->train_set[0] & DP_TRAIN_VOLTAGE_SWING_MASK;
 
                /* Update training set as requested by target */
-               if (!intel_dp_update_link_train(intel_dp, link_status)) {
+               intel_get_adjust_train(intel_dp, link_status);
+               if (!intel_dp_update_link_train(intel_dp)) {
                        DRM_ERROR("failed to update link training\n");
                        break;
                }
@@ -3885,7 +3891,8 @@ intel_dp_link_training_channel_equalization(struct 
intel_dp *intel_dp)
                }
 
                /* Update training set as requested by target */
-               if (!intel_dp_update_link_train(intel_dp, link_status)) {
+               intel_get_adjust_train(intel_dp, link_status);
+               if (!intel_dp_update_link_train(intel_dp)) {
                        DRM_ERROR("failed to update link training\n");
                        break;
                }
-- 
2.4.3

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx