Cc: Alex Dai <yu....@intel.com>
Cc: Tom O'Rourke <Tom.O'rou...@intel.com>
Cc: Akash Goel <akash.g...@intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kam...@intel.com>
---
 drivers/gpu/drm/i915/i915_guc_reg.h | 1 +
 drivers/gpu/drm/i915/intel_pm.c     | 4 ++++
 2 files changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_guc_reg.h 
b/drivers/gpu/drm/i915/i915_guc_reg.h
index 8c8e574..9d79a6b 100644
--- a/drivers/gpu/drm/i915/i915_guc_reg.h
+++ b/drivers/gpu/drm/i915/i915_guc_reg.h
@@ -53,6 +53,7 @@
 #define   START_DMA                      (1<<0)
 #define DMA_GUC_WOPCM_OFFSET           0xc340
 #define   GUC_WOPCM_OFFSET_VALUE         0x80000       /* 512KB */
+#define GUC_MAX_IDLE_COUNT             0xC3E4
 
 #define GUC_WOPCM_SIZE                 0xc050
 #define   GUC_WOPCM_SIZE_VALUE           (0x80 << 12)  /* 512KB */
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 4d6bb6b..6843a48 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -4841,6 +4841,10 @@ static void gen9_enable_rc6(struct drm_device *dev)
        I915_WRITE(GEN6_RC_IDLE_HYSTERSIS, 25); /* 25 * 1280ns */
        for_each_ring(ring, dev_priv, unused)
                I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10);
+
+       if (HAS_GUC_UCODE(dev))
+               I915_WRITE(GUC_MAX_IDLE_COUNT, 0xA);
+
        I915_WRITE(GEN6_RC_SLEEP, 0);
        I915_WRITE(GEN6_RC6_THRESHOLD, 37500); /* 37.5/125ms per EI */
 
-- 
1.9.1

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