On pe, 2015-09-11 at 16:31 -0700, Dongwon Kim wrote:
> From: dw kim <dongwon....@intel.com>
>
> Correct bit mapping of EUs in 'eu_disable' fuse register
> for each subslice is (each word represents one subslice),
>
> bit # 7 6 5 4 3 2 1 0
> EU # 11 10 9 8 3 2 1 0
>
> In BXT, each subslice has 6 EUs at most, which are EU0~EU2
> and EU8~EU10 (EU11 and EU3 don't exist). Therefore, correct
> eu_mask should be 0x77 to cover all EUs in each subslice that
> can be possibly enabled.
>
> v2: fixed some whitespaces and added "drm/i915:" to the title
>
> Cc: Matthew D Roper <matthew.d.ro...@intel.com>
> Signed-off-by: dw kim <dongwon....@intel.com>
> ---
> drivers/gpu/drm/i915/i915_dma.c | 16 ++++++++++++----
> 1 file changed, 12 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index 066a0ef..3f34dd3 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -633,13 +633,21 @@ static void gen9_sseu_info_init(struct drm_device *dev)
>
> /*
> * BXT has a single slice. BXT also has at most 6 EU per subslice,
> - * and therefore only the lowest 6 bits of the 8-bit EU disable
> - * fields are valid.
> - */
> + * and bit mappings vs EU # in eu_disable fuse value in one subslice
> + * is like this;
> + *
> + * Bit # 7 6 5 4 3 2 1 0
> + * EU # 11 10 9 8 3 2 1 0
> + *
> + * Since only EUs with number "0, 1, 2, 8, 9, 10" are available in
> + * each subslice in BXT, bits in eu_mask should also be set according
> + * to this mapping, therefore, eu_mask = 0x77.
> + */
> +
> if (IS_BROXTON(dev)) {
> s_max = 1;
> eu_max = 6;
> - eu_mask = 0x3f;
> + eu_mask = 0x77;
> }
Yes, this matches bspec (and is a review fail on my side). I would
prefer though fixing it by simply removing the above BXT specific
max/mask values. Both GEN8_FUSE2 and GEN9_EU_DISABLE(0) contain the
proper values for each platform/SKU, so that the generic parsing will
work everywhere without the need to differentiate between platforms.
>
> info = (struct intel_device_info *)&dev_priv->info;
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