From: Ville Syrjälä <ville.syrj...@linux.intel.com>

We have a few users of the raw register acces functions outside
intel_uncore.c, so let's just move the functions into intel_drv.h.

Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com>
---
 drivers/gpu/drm/i915/i915_debugfs.c |  2 +-
 drivers/gpu/drm/i915/i915_drv.h     | 28 ++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/i915_irq.c     |  2 --
 drivers/gpu/drm/i915/intel_uncore.c | 28 ----------------------------
 4 files changed, 29 insertions(+), 31 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_debugfs.c 
b/drivers/gpu/drm/i915/i915_debugfs.c
index 47ef007..2322dac 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -1516,7 +1516,7 @@ static int gen6_drpc_info(struct seq_file *m)
                seq_printf(m, "RC information accurate: %s\n", yesno(count < 
51));
        }
 
-       gt_core_status = readl(dev_priv->regs + GEN6_GT_CORE_STATUS);
+       gt_core_status = __raw_i915_read32(dev_priv, GEN6_GT_CORE_STATUS);
        trace_i915_reg_rw(false, GEN6_GT_CORE_STATUS, gt_core_status, 4, true);
 
        rpmodectl1 = I915_READ(GEN6_RP_CONTROL);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 3e35e08..91ed3c2 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -3502,4 +3502,32 @@ static inline void i915_trace_irq_get(struct 
intel_engine_cs *ring,
                i915_gem_request_assign(&ring->trace_irq_req, req);
 }
 
+#define __raw_read(x, s) \
+static inline uint##x##_t __raw_i915_read##x(struct drm_i915_private 
*dev_priv, \
+                                            uint32_t reg) \
+{ \
+       return read##s(dev_priv->regs + reg); \
+}
+
+#define __raw_write(x, s) \
+static inline void __raw_i915_write##x(struct drm_i915_private *dev_priv, \
+                                      uint32_t reg, uint##x##_t val) \
+{ \
+       write##s(val, dev_priv->regs + reg); \
+}
+__raw_read(8, b)
+__raw_read(16, w)
+__raw_read(32, l)
+__raw_read(64, q)
+
+__raw_write(8, b)
+__raw_write(16, w)
+__raw_write(32, l)
+__raw_write(64, q)
+
+#undef __raw_read
+#undef __raw_write
+
+#define __raw_posting_read(dev_priv__, reg__) 
(void)__raw_i915_read32((dev_priv__), (reg__))
+
 #endif
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index d181dab..a6c23b2 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -679,8 +679,6 @@ static u32 g4x_get_vblank_counter(struct drm_device *dev, 
int pipe)
 }
 
 /* raw reads, only for fast reads of display block, no need for forcewake etc. 
*/
-#define __raw_i915_read32(dev_priv__, reg__) readl((dev_priv__)->regs + 
(reg__))
-
 static int __intel_get_crtc_scanline(struct intel_crtc *crtc)
 {
        struct drm_device *dev = crtc->base.dev;
diff --git a/drivers/gpu/drm/i915/intel_uncore.c 
b/drivers/gpu/drm/i915/intel_uncore.c
index 5b27ee1..acf9b4b 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -29,34 +29,6 @@
 
 #define FORCEWAKE_ACK_TIMEOUT_MS 2
 
-#define __raw_read(x, s) \
-static inline uint##x##_t __raw_i915_read##x(struct drm_i915_private 
*dev_priv, \
-                                            uint32_t reg) \
-{ \
-       return read##s(dev_priv->regs + reg); \
-}
-
-#define __raw_write(x, s) \
-static inline void __raw_i915_write##x(struct drm_i915_private *dev_priv, \
-                                      uint32_t reg, uint##x##_t val) \
-{ \
-       write##s(val, dev_priv->regs + reg); \
-}
-__raw_read(8, b)
-__raw_read(16, w)
-__raw_read(32, l)
-__raw_read(64, q)
-
-__raw_write(8, b)
-__raw_write(16, w)
-__raw_write(32, l)
-__raw_write(64, q)
-
-#undef __raw_read
-#undef __raw_write
-
-#define __raw_posting_read(dev_priv__, reg__) 
(void)__raw_i915_read32((dev_priv__), (reg__))
-
 static const char * const forcewake_domain_names[] = {
        "render",
        "blitter",
-- 
2.4.6

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to