On Fri, Sep 25, 2015 at 08:39:39PM +0300, Ville Syrjälä wrote: > On Fri, Sep 25, 2015 at 02:33:42PM +0100, Arun Siluvery wrote: > > Dropping it because it is for pre-production stepping. > > > > Signed-off-by: Arun Siluvery <[email protected]> > > > --- > > drivers/gpu/drm/i915/intel_pm.c | 4 +--- > > 1 file changed, 1 insertion(+), 3 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/intel_pm.c > > b/drivers/gpu/drm/i915/intel_pm.c > > index be39f7ad..a6ee0d3 100644 > > --- a/drivers/gpu/drm/i915/intel_pm.c > > +++ b/drivers/gpu/drm/i915/intel_pm.c > > @@ -77,12 +77,10 @@ static void skl_init_clock_gating(struct drm_device > > *dev) > > > > if (INTEL_REVID(dev) <= SKL_REVID_B0) { > > /* > > - * WaDisableSDEUnitClockGating:skl > > * WaSetGAPSunitClckGateDisable:skl > > */ > > I915_WRITE(GEN8_UCGCTL6, I915_READ(GEN8_UCGCTL6) | > > - GEN8_GAPSUNIT_CLOCK_GATE_DISABLE | > > - GEN8_SDEUNIT_CLOCK_GATE_DISABLE); > > + GEN8_GAPSUNIT_CLOCK_GATE_DISABLE); > > Reviewed-by: Ville Syrjälä <[email protected]>
Queued for -next, thanks for the patch. -Daniel > > Not that BXT has the same with another name > WaSetSDEunitClckGatingDisable. We seem to have the "wrong" name in the > code for BXT. Also it could apparently use an A0 check. > > > > > /* WaDisableVFUnitClockGating:skl */ > > I915_WRITE(GEN6_UCGCTL2, I915_READ(GEN6_UCGCTL2) | > > -- > > 1.9.1 > > > > _______________________________________________ > > Intel-gfx mailing list > > [email protected] > > http://lists.freedesktop.org/mailman/listinfo/intel-gfx > > -- > Ville Syrjälä > Intel OTC > _______________________________________________ > Intel-gfx mailing list > [email protected] > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list [email protected] http://lists.freedesktop.org/mailman/listinfo/intel-gfx
