On ke, 2015-08-26 at 16:58 +0530, Animesh Manna wrote:
> Note that for bxt without dmc, display engine can go to lowest
> possible state (dc9), so releasing the rpm reference.
>
> Cc: Daniel Vetter <daniel.vet...@intel.com>
> Cc: Damien Lespiau <damien.lesp...@intel.com>
> Cc: Imre Deak <imre.d...@intel.com>
> Cc: Sunil Kamath <sunil.kam...@intel.com>
> Signed-off-by: Animesh Manna <animesh.ma...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_csr.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_csr.c
> b/drivers/gpu/drm/i915/intel_csr.c
> index 75a775b..be388da 100644
> --- a/drivers/gpu/drm/i915/intel_csr.c
> +++ b/drivers/gpu/drm/i915/intel_csr.c
> @@ -392,7 +392,7 @@ static void finish_csr_load(const struct firmware *fw,
> void *context)
>
> DRM_DEBUG_KMS("Finished loading %s\n", dev_priv->csr.fw_path);
> out:
> - if (fw_loaded)
> + if (fw_loaded || IS_BROXTON(dev))
> intel_display_power_put(dev_priv, POWER_DOMAIN_INIT);
I don't think this is needed. We disable all display side runtime power
management if the firmware is not available. So no need to special case
this either imo.
> else
> intel_csr_load_status_set(dev_priv, FW_FAILED);
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