The current DC6 functionality is stable enough for development and is badly 
needed for working down other platform power issues.  I'm fine if you want to 
disable it by default, but please only do so in conjunction with i915 kernel 
override flags to reenable it at runtime.

Gavin Hindman
Senior Program Manager
SSG/OTC – Open Source Technology Center

-----Original Message-----
From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of 
Rodrigo Vivi
Sent: Monday, October 12, 2015 8:43 AM
To: intel-gfx@lists.freedesktop.org
Cc: Vivi, Rodrigo <rodrigo.v...@intel.com>
Subject: [Intel-gfx] [PATCH] drm/i915: Disable DC6 for now.

There is an intermitent RAM corruption happening with DMC micro-controler when 
in DC6 transitioning to PC9/10. So the recoomendation is to use DC5 as the 
deeper DC state for now until this issue is being investigated at firmware 
level.

This macros must be re-worked in order to allow us to use module parameters to 
allow max DC states. However let's do this simple approach first before 
products out there start facing this corruption. Also this is the easiest one 
to be backported by products.

Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
---
 drivers/gpu/drm/i915/intel_runtime_pm.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c 
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index ec010ee..7332cc0 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -49,8 +49,8 @@
  * present for a given platform.
  */
 
-#define GEN9_ENABLE_DC5(dev) 0
-#define SKL_ENABLE_DC6(dev) IS_SKYLAKE(dev)
+#define GEN9_ENABLE_DC5(dev) IS_SKYLAKE(dev) #define 
+SKL_ENABLE_DC6(dev) 0
 
 #define for_each_power_well(i, power_well, domain_mask, power_domains) \
        for (i = 0;                                                     \
--
2.4.3

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