In plane enabling sequence, plane gamma bit is by default enabled.
Plane gamma gets higher priority than pipe gamma, if both enabled.

This patch disables plane gamma from sequence. If required, plane
gamma can be enabled via the color manager drm interface.

Signed-off-by: Shashank Sharma <shashank.sha...@intel.com>
Signed-off-by: Kumar, Kiran S <kiran.s.ku...@intel.com>
---
 drivers/gpu/drm/i915/intel_display.c | 2 +-
 drivers/gpu/drm/i915/intel_sprite.c  | 7 ++++---
 2 files changed, 5 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_display.c 
b/drivers/gpu/drm/i915/intel_display.c
index 61562a3..72b701a 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -2820,7 +2820,7 @@ static void ironlake_update_primary_plane(struct drm_crtc 
*crtc,
 
        pixel_size = drm_format_plane_cpp(fb->pixel_format, 0);
 
-       dspcntr = DISPPLANE_GAMMA_ENABLE;
+       dspcntr = (DISPPLANE_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE);
 
        dspcntr |= DISPLAY_PLANE_ENABLE;
 
diff --git a/drivers/gpu/drm/i915/intel_sprite.c 
b/drivers/gpu/drm/i915/intel_sprite.c
index 56dc132..6e2be1c 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -204,7 +204,8 @@ skl_update_plane(struct drm_plane *drm_plane, struct 
drm_crtc *crtc,
 
        plane_ctl = PLANE_CTL_ENABLE |
                PLANE_CTL_PIPE_GAMMA_ENABLE |
-               PLANE_CTL_PIPE_CSC_ENABLE;
+               PLANE_CTL_PIPE_CSC_ENABLE |
+               PLANE_CTL_PLANE_GAMMA_DISABLE;
 
        plane_ctl |= skl_plane_ctl_format(fb->pixel_format);
        plane_ctl |= skl_plane_ctl_tiling(fb->modifier[0]);
@@ -409,7 +410,7 @@ vlv_update_plane(struct drm_plane *dplane, struct drm_crtc 
*crtc,
         * Enable gamma to match primary/cursor plane behaviour.
         * FIXME should be user controllable via propertiesa.
         */
-       sprctl |= SP_GAMMA_ENABLE;
+       sprctl |= (SP_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE);
 
        if (obj->tiling_mode != I915_TILING_NONE)
                sprctl |= SP_TILED;
@@ -528,7 +529,7 @@ ivb_update_plane(struct drm_plane *plane, struct drm_crtc 
*crtc,
         * Enable gamma to match primary/cursor plane behaviour.
         * FIXME should be user controllable via propertiesa.
         */
-       sprctl |= SPRITE_GAMMA_ENABLE;
+       sprctl |= (SPRITE_GAMMA_ENABLE | PLANE_CTL_PLANE_GAMMA_DISABLE);
 
        if (obj->tiling_mode != I915_TILING_NONE)
                sprctl |= SPRITE_TILED;
-- 
1.9.1

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
http://lists.freedesktop.org/mailman/listinfo/intel-gfx

Reply via email to