On Fri, Oct 23, 2015 at 09:22:38PM +0300, Ville Syrjälä wrote: > On Fri, Oct 23, 2015 at 06:56:41PM +0100, Chris Wilson wrote: > > On Fri, Oct 23, 2015 at 08:50:42PM +0300, Ville Syrjälä wrote: > > > On Fri, Oct 23, 2015 at 06:43:31PM +0100, Chris Wilson wrote: > > > > As the HWS is mapped into the GPU as uncached, > > > > > > Since when? > > > > Since it is embedded into execlists' default context which is allocated > > using the system default cache level, i.e. uncached on !llc. See > > intel_lr_context_deferred_alloc() > > Oh right. That doesn't actually matter since it's mapped through ggtt > which means it always goes through PAT 0.
Oh, that again. Doesn't that mean we broke i915.enable_ppgtt=0? -Chris -- Chris Wilson, Intel Open Source Technology Centre _______________________________________________ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org http://lists.freedesktop.org/mailman/listinfo/intel-gfx
