On Thu, Nov 05, 2015 at 10:50:08AM -0800, Rodrigo Vivi wrote:
> With Fastboot by default we don't necessarily do a
> full modeset enabling the primary plane.
> So DRRS enable call that was in that path wasn't being
> called anymore.
>
> So, let's relly on post atomic modeset path
> and on has_drrs to enabled DRRS when we judge necessary.
>
> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 11 +++++++++++
> drivers/gpu/drm/i915/intel_drv.h | 2 ++
> 2 files changed, 13 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index f67e2ee..6647bfe 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4681,6 +4681,9 @@ static void intel_post_plane_update(struct intel_crtc
> *crtc)
> if (crtc->atomic.update_wm_post)
> intel_update_watermarks(&crtc->base);
>
> + if (atomic->enable_drrs)
> + intel_drrs_enable(crtc);
Same comment as with psr. And encoder post_modeset fixup function would be
a lot cleaner instead of leaking this all into crtc code.
-Daniel
> +
> if (atomic->update_fbc)
> intel_fbc_update(dev_priv);
>
> @@ -4702,6 +4705,9 @@ static void intel_pre_plane_update(struct intel_crtc
> *crtc)
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_crtc_atomic_commit *atomic = &crtc->atomic;
>
> + if (crtc->atomic.disable_drrs)
> + intel_drrs_disable(crtc);
> +
> if (atomic->disable_fbc)
> intel_fbc_disable_crtc(crtc);
>
> @@ -11565,10 +11571,15 @@ int intel_plane_atomic_calc_changes(struct
> drm_crtc_state *crtc_state,
> */
> intel_crtc->atomic.disable_ips = true;
>
> + intel_crtc->atomic.disable_drrs = true;
> +
> intel_crtc->atomic.disable_fbc = true;
>
> intel_crtc->atomic.disable_psr = true;
> }
> + if (visible && intel_crtc->config->has_drrs)
> + intel_crtc->atomic.enable_drrs = true;
> +
> if (visible && intel_crtc->config->ips_ready)
> intel_crtc->atomic.enable_ips = true;
>
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 48f461f..bf5e77c 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -529,6 +529,7 @@ struct intel_mmio_flip {
> */
> struct intel_crtc_atomic_commit {
> /* Sleepable operations to perform before commit */
> + bool disable_drrs;
> bool disable_fbc;
> bool disable_ips;
> bool disable_psr;
> @@ -539,6 +540,7 @@ struct intel_crtc_atomic_commit {
> /* Sleepable operations to perform after commit */
> unsigned fb_bits;
> bool wait_vblank;
> + bool enable_drrs;
> bool update_fbc;
> bool enable_ips;
> bool enable_psr;
> --
> 2.4.3
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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