On Mon, Feb 08, 2016 at 03:02:48PM -0800, yu....@intel.com wrote:
> From: Alex Dai <yu....@intel.com>
>
> Rename some of the GuC fw loading code to make them more general. We
> will utilize them for HuC loading as well.
> s/intel_guc_fw/intel_uc_fw/g
> s/GUC_FIRMWARE/UC_FIRMWARE/g
>
> Struct intel_guc_fw is renamed to intel_uc_fw. Prefix of tts members,
> such as 'guc' or 'guc_fw' either is renamed to 'uc' or removed for
> same purpose.
>
> Signed-off-by: Alex Dai <yu....@intel.com>
> Signed-off-by: Peter Antoine <peter.anto...@intel.com>
I still don't see what this firmware loader wrapper around the mainline
firmware loader provide. It has a complicated status matrix for one, that
doesn't really seem to be required - either the firmware is there or not.
All that *_status stuff seems unecessary to me.
Can we instead just reduce this? And then use plain old firmware loader
like for dmc, maybe with a small convenience function that loads it into a
gem bo. In case of doubt I think open-coding using a set of helpers (to
load firmware, throw it into a gem obj and then just use core gem function
to bind the vma somewhere) is much better.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 12 +--
> drivers/gpu/drm/i915/intel_guc.h | 39 +++----
> drivers/gpu/drm/i915/intel_guc_loader.c | 177
> +++++++++++++++++---------------
> 3 files changed, 120 insertions(+), 108 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index ec0c2a05e..873f1b2 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -2402,7 +2402,7 @@ static int i915_guc_load_status_info(struct seq_file
> *m, void *data)
> {
> struct drm_info_node *node = m->private;
> struct drm_i915_private *dev_priv = node->minor->dev->dev_private;
> - struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
> u32 tmp, i;
>
> if (!HAS_GUC_UCODE(dev_priv->dev))
> @@ -2410,15 +2410,15 @@ static int i915_guc_load_status_info(struct seq_file
> *m, void *data)
>
> seq_printf(m, "GuC firmware status:\n");
> seq_printf(m, "\tpath: %s\n",
> - guc_fw->guc_fw_path);
> + guc_fw->uc_fw_path);
> seq_printf(m, "\tfetch: %s\n",
> - intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status));
> + intel_uc_fw_status_repr(guc_fw->fetch_status));
> seq_printf(m, "\tload: %s\n",
> - intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
> + intel_uc_fw_status_repr(guc_fw->load_status));
> seq_printf(m, "\tversion wanted: %d.%d\n",
> - guc_fw->guc_fw_major_wanted, guc_fw->guc_fw_minor_wanted);
> + guc_fw->major_ver_wanted, guc_fw->minor_ver_wanted);
> seq_printf(m, "\tversion found: %d.%d\n",
> - guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found);
> + guc_fw->major_ver_found, guc_fw->minor_ver_found);
> seq_printf(m, "\theader: offset is %d; size = %d\n",
> guc_fw->header_offset, guc_fw->header_size);
> seq_printf(m, "\tuCode: offset is %d; size = %d\n",
> diff --git a/drivers/gpu/drm/i915/intel_guc.h
> b/drivers/gpu/drm/i915/intel_guc.h
> index 73002e9..4e20b0c 100644
> --- a/drivers/gpu/drm/i915/intel_guc.h
> +++ b/drivers/gpu/drm/i915/intel_guc.h
> @@ -52,29 +52,29 @@ struct i915_guc_client {
> int retcode;
> };
>
> -enum intel_guc_fw_status {
> - GUC_FIRMWARE_FAIL = -1,
> - GUC_FIRMWARE_NONE = 0,
> - GUC_FIRMWARE_PENDING,
> - GUC_FIRMWARE_SUCCESS
> +enum intel_uc_fw_status {
> + UC_FIRMWARE_FAIL = -1,
> + UC_FIRMWARE_NONE = 0,
> + UC_FIRMWARE_PENDING,
> + UC_FIRMWARE_SUCCESS
> };
>
> /*
> * This structure encapsulates all the data needed during the process
> * of fetching, caching, and loading the firmware image into the GuC.
> */
> -struct intel_guc_fw {
> - struct drm_device * guc_dev;
> - const char * guc_fw_path;
> - size_t guc_fw_size;
> - struct drm_i915_gem_object * guc_fw_obj;
> - enum intel_guc_fw_status guc_fw_fetch_status;
> - enum intel_guc_fw_status guc_fw_load_status;
> -
> - uint16_t guc_fw_major_wanted;
> - uint16_t guc_fw_minor_wanted;
> - uint16_t guc_fw_major_found;
> - uint16_t guc_fw_minor_found;
> +struct intel_uc_fw {
> + struct drm_device * uc_dev;
> + const char * uc_fw_path;
> + size_t uc_fw_size;
> + struct drm_i915_gem_object * uc_fw_obj;
> + enum intel_uc_fw_status fetch_status;
> + enum intel_uc_fw_status load_status;
> +
> + uint16_t major_ver_wanted;
> + uint16_t minor_ver_wanted;
> + uint16_t major_ver_found;
> + uint16_t minor_ver_found;
>
> uint32_t header_size;
> uint32_t header_offset;
> @@ -85,7 +85,7 @@ struct intel_guc_fw {
> };
>
> struct intel_guc {
> - struct intel_guc_fw guc_fw;
> + struct intel_uc_fw guc_fw;
> uint32_t log_flags;
> struct drm_i915_gem_object *log_obj;
>
> @@ -114,9 +114,10 @@ struct intel_guc {
> extern void intel_guc_ucode_init(struct drm_device *dev);
> extern int intel_guc_ucode_load(struct drm_device *dev);
> extern void intel_guc_ucode_fini(struct drm_device *dev);
> -extern const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status);
> +extern const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status);
> extern int intel_guc_suspend(struct drm_device *dev);
> extern int intel_guc_resume(struct drm_device *dev);
> +void intel_uc_fw_fetch(struct drm_device *dev, struct intel_uc_fw *uc_fw);
>
> /* i915_guc_submission.c */
> int i915_guc_submission_init(struct drm_device *dev);
> diff --git a/drivers/gpu/drm/i915/intel_guc_loader.c
> b/drivers/gpu/drm/i915/intel_guc_loader.c
> index 3accd91..318b5fd 100644
> --- a/drivers/gpu/drm/i915/intel_guc_loader.c
> +++ b/drivers/gpu/drm/i915/intel_guc_loader.c
> @@ -63,16 +63,16 @@
> MODULE_FIRMWARE(I915_SKL_GUC_UCODE);
>
> /* User-friendly representation of an enum */
> -const char *intel_guc_fw_status_repr(enum intel_guc_fw_status status)
> +const char *intel_uc_fw_status_repr(enum intel_uc_fw_status status)
> {
> switch (status) {
> - case GUC_FIRMWARE_FAIL:
> + case UC_FIRMWARE_FAIL:
> return "FAIL";
> - case GUC_FIRMWARE_NONE:
> + case UC_FIRMWARE_NONE:
> return "NONE";
> - case GUC_FIRMWARE_PENDING:
> + case UC_FIRMWARE_PENDING:
> return "PENDING";
> - case GUC_FIRMWARE_SUCCESS:
> + case UC_FIRMWARE_SUCCESS:
> return "SUCCESS";
> default:
> return "UNKNOWN!";
> @@ -224,8 +224,8 @@ static inline bool guc_ucode_response(struct
> drm_i915_private *dev_priv,
> */
> static int guc_ucode_xfer_dma(struct drm_i915_private *dev_priv)
> {
> - struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> - struct drm_i915_gem_object *fw_obj = guc_fw->guc_fw_obj;
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
> + struct drm_i915_gem_object *fw_obj = guc_fw->uc_fw_obj;
> unsigned long offset;
> struct sg_table *sg = fw_obj->pages;
> u32 status, rsa[UOS_RSA_SCRATCH_MAX_COUNT];
> @@ -286,17 +286,17 @@ static int guc_ucode_xfer_dma(struct drm_i915_private
> *dev_priv)
> */
> static int guc_ucode_xfer(struct drm_i915_private *dev_priv)
> {
> - struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
> struct drm_device *dev = dev_priv->dev;
> int ret;
>
> - ret = i915_gem_object_set_to_gtt_domain(guc_fw->guc_fw_obj, false);
> + ret = i915_gem_object_set_to_gtt_domain(guc_fw->uc_fw_obj, false);
> if (ret) {
> DRM_DEBUG_DRIVER("set-domain failed %d\n", ret);
> return ret;
> }
>
> - ret = i915_gem_obj_ggtt_pin(guc_fw->guc_fw_obj, 0, 0);
> + ret = i915_gem_obj_ggtt_pin(guc_fw->uc_fw_obj, 0, 0);
> if (ret) {
> DRM_DEBUG_DRIVER("pin failed %d\n", ret);
> return ret;
> @@ -348,7 +348,7 @@ static int guc_ucode_xfer(struct drm_i915_private
> *dev_priv)
> * We keep the object pages for reuse during resume. But we can unpin it
> * now that DMA has completed, so it doesn't continue to take up space.
> */
> - i915_gem_object_ggtt_unpin(guc_fw->guc_fw_obj);
> + i915_gem_object_ggtt_unpin(guc_fw->uc_fw_obj);
>
> return ret;
> }
> @@ -368,48 +368,48 @@ static int guc_ucode_xfer(struct drm_i915_private
> *dev_priv)
> int intel_guc_ucode_load(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> - struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
> int err = 0;
>
> if (!i915.enable_guc_submission)
> return 0;
>
> DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n",
> - intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
> - intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
> + intel_uc_fw_status_repr(guc_fw->fetch_status),
> + intel_uc_fw_status_repr(guc_fw->load_status));
>
> direct_interrupts_to_host(dev_priv);
>
> - if (guc_fw->guc_fw_fetch_status == GUC_FIRMWARE_NONE)
> + if (guc_fw->fetch_status == UC_FIRMWARE_NONE)
> return 0;
>
> - if (guc_fw->guc_fw_fetch_status == GUC_FIRMWARE_SUCCESS &&
> - guc_fw->guc_fw_load_status == GUC_FIRMWARE_FAIL)
> + if (guc_fw->fetch_status == UC_FIRMWARE_SUCCESS &&
> + guc_fw->load_status == UC_FIRMWARE_FAIL)
> return -ENOEXEC;
>
> - guc_fw->guc_fw_load_status = GUC_FIRMWARE_PENDING;
> + guc_fw->load_status = UC_FIRMWARE_PENDING;
>
> DRM_DEBUG_DRIVER("GuC fw fetch status %s\n",
> - intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status));
> + intel_uc_fw_status_repr(guc_fw->fetch_status));
>
> - switch (guc_fw->guc_fw_fetch_status) {
> - case GUC_FIRMWARE_FAIL:
> + switch (guc_fw->fetch_status) {
> + case UC_FIRMWARE_FAIL:
> /* something went wrong :( */
> err = -EIO;
> goto fail;
>
> - case GUC_FIRMWARE_NONE:
> - case GUC_FIRMWARE_PENDING:
> + case UC_FIRMWARE_NONE:
> + case UC_FIRMWARE_PENDING:
> default:
> /* "can't happen" */
> - WARN_ONCE(1, "GuC fw %s invalid guc_fw_fetch_status %s [%d]\n",
> - guc_fw->guc_fw_path,
> - intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
> - guc_fw->guc_fw_fetch_status);
> + WARN_ONCE(1, "GuC fw %s invalid fetch_status %s [%d]\n",
> + guc_fw->uc_fw_path,
> + intel_uc_fw_status_repr(guc_fw->fetch_status),
> + guc_fw->fetch_status);
> err = -ENXIO;
> goto fail;
>
> - case GUC_FIRMWARE_SUCCESS:
> + case UC_FIRMWARE_SUCCESS:
> break;
> }
>
> @@ -421,11 +421,11 @@ int intel_guc_ucode_load(struct drm_device *dev)
> if (err)
> goto fail;
>
> - guc_fw->guc_fw_load_status = GUC_FIRMWARE_SUCCESS;
> + guc_fw->load_status = UC_FIRMWARE_SUCCESS;
>
> DRM_DEBUG_DRIVER("GuC fw status: fetch %s, load %s\n",
> - intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status),
> - intel_guc_fw_status_repr(guc_fw->guc_fw_load_status));
> + intel_uc_fw_status_repr(guc_fw->fetch_status),
> + intel_uc_fw_status_repr(guc_fw->load_status));
>
> if (i915.enable_guc_submission) {
> /* The execbuf_client will be recreated. Release it first. */
> @@ -440,8 +440,8 @@ int intel_guc_ucode_load(struct drm_device *dev)
> return 0;
>
> fail:
> - if (guc_fw->guc_fw_load_status == GUC_FIRMWARE_PENDING)
> - guc_fw->guc_fw_load_status = GUC_FIRMWARE_FAIL;
> + if (guc_fw->load_status == UC_FIRMWARE_PENDING)
> + guc_fw->load_status = UC_FIRMWARE_FAIL;
>
> direct_interrupts_to_host(dev_priv);
> i915_guc_submission_disable(dev);
> @@ -450,7 +450,18 @@ fail:
> return err;
> }
>
> -static void guc_fw_fetch(struct drm_device *dev, struct intel_guc_fw *guc_fw)
> +/**
> + * intel_uc_fw_fetch() - fetch fw blob and save it to internal obj
> + * @dev: drm device
> + * @uc_fw: the intel_uc_fw to be setup
> + *
> + * The caller should have setup fw path and fw version required. This
> function
> + * first fetch the fw blob from file system. If succeed, it will do some
> basic
> + * check based on css header information. At last, a GEM obj is created and
> + * filled with the fw data. This obj will be loaded to HW at later stage of
> + * driver init process.
> + */
> +void intel_uc_fw_fetch(struct drm_device *dev, struct intel_uc_fw *uc_fw)
> {
> struct drm_i915_gem_object *obj;
> const struct firmware *fw;
> @@ -458,17 +469,17 @@ static void guc_fw_fetch(struct drm_device *dev, struct
> intel_guc_fw *guc_fw)
> size_t size;
> int err;
>
> - DRM_DEBUG_DRIVER("before requesting firmware: GuC fw fetch status %s\n",
> - intel_guc_fw_status_repr(guc_fw->guc_fw_fetch_status));
> + DRM_DEBUG_DRIVER("before requesting firmware: uC fw fetch status %s\n",
> + intel_uc_fw_status_repr(uc_fw->fetch_status));
>
> - err = request_firmware(&fw, guc_fw->guc_fw_path, &dev->pdev->dev);
> + err = request_firmware(&fw, uc_fw->uc_fw_path, &dev->pdev->dev);
> if (err)
> goto fail;
> if (!fw)
> goto fail;
>
> - DRM_DEBUG_DRIVER("fetch GuC fw from %s succeeded, fw %p\n",
> - guc_fw->guc_fw_path, fw);
> + DRM_DEBUG_DRIVER("fetch uC fw from %s succeeded, fw %p\n",
> + uc_fw->uc_fw_path, fw);
>
> /* Check the size of the blob before examining buffer contents */
> if (fw->size < sizeof(struct guc_css_header)) {
> @@ -479,36 +490,36 @@ static void guc_fw_fetch(struct drm_device *dev, struct
> intel_guc_fw *guc_fw)
> css = (struct guc_css_header *)fw->data;
>
> /* Firmware bits always start from header */
> - guc_fw->header_offset = 0;
> - guc_fw->header_size = (css->header_size_dw - css->modulus_size_dw -
> + uc_fw->header_offset = 0;
> + uc_fw->header_size = (css->header_size_dw - css->modulus_size_dw -
> css->key_size_dw - css->exponent_size_dw) * sizeof(u32);
>
> - if (guc_fw->header_size != sizeof(struct guc_css_header)) {
> + if (uc_fw->header_size != sizeof(struct guc_css_header)) {
> DRM_ERROR("CSS header definition mismatch\n");
> goto fail;
> }
>
> /* then, uCode */
> - guc_fw->ucode_offset = guc_fw->header_offset + guc_fw->header_size;
> - guc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
> + uc_fw->ucode_offset = uc_fw->header_offset + uc_fw->header_size;
> + uc_fw->ucode_size = (css->size_dw - css->header_size_dw) * sizeof(u32);
>
> /* now RSA */
> if (css->key_size_dw != UOS_RSA_SCRATCH_MAX_COUNT) {
> DRM_ERROR("RSA key size is bad\n");
> goto fail;
> }
> - guc_fw->rsa_offset = guc_fw->ucode_offset + guc_fw->ucode_size;
> - guc_fw->rsa_size = css->key_size_dw * sizeof(u32);
> + uc_fw->rsa_offset = uc_fw->ucode_offset + uc_fw->ucode_size;
> + uc_fw->rsa_size = css->key_size_dw * sizeof(u32);
>
> /* At least, it should have header, uCode and RSA. Size of all three. */
> - size = guc_fw->header_size + guc_fw->ucode_size + guc_fw->rsa_size;
> + size = uc_fw->header_size + uc_fw->ucode_size + uc_fw->rsa_size;
> if (fw->size < size) {
> DRM_ERROR("Missing firmware components\n");
> goto fail;
> }
>
> /* Header and uCode will be loaded to WOPCM. Size of the two. */
> - size = guc_fw->header_size + guc_fw->ucode_size;
> + size = uc_fw->header_size + uc_fw->ucode_size;
>
> /* Top 32k of WOPCM is reserved (8K stack + 24k RC6 context). */
> if (size > GUC_WOPCM_SIZE_VALUE - 0x8000) {
> @@ -517,26 +528,26 @@ static void guc_fw_fetch(struct drm_device *dev, struct
> intel_guc_fw *guc_fw)
> }
>
> /*
> - * The GuC firmware image has the version number embedded at a
> well-known
> + * The uC firmware image has the version number embedded at a well-known
> * offset within the firmware blob; note that major / minor version are
> * TWO bytes each (i.e. u16), although all pointers and offsets are
> defined
> * in terms of bytes (u8).
> */
> - guc_fw->guc_fw_major_found = css->guc_sw_version >> 16;
> - guc_fw->guc_fw_minor_found = css->guc_sw_version & 0xFFFF;
> -
> - if (guc_fw->guc_fw_major_found != guc_fw->guc_fw_major_wanted ||
> - guc_fw->guc_fw_minor_found < guc_fw->guc_fw_minor_wanted) {
> - DRM_ERROR("GuC firmware version %d.%d, required %d.%d\n",
> - guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found,
> - guc_fw->guc_fw_major_wanted,
> guc_fw->guc_fw_minor_wanted);
> + uc_fw->major_ver_found = css->guc_sw_version >> 16;
> + uc_fw->minor_ver_found = css->guc_sw_version & 0xFFFF;
> +
> + if (uc_fw->major_ver_found != uc_fw->major_ver_wanted ||
> + uc_fw->minor_ver_found < uc_fw->minor_ver_wanted) {
> + DRM_ERROR("Firmware version %d.%d, required %d.%d\n",
> + uc_fw->major_ver_found, uc_fw->minor_ver_found,
> + uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted);
> err = -ENOEXEC;
> goto fail;
> }
>
> DRM_DEBUG_DRIVER("firmware version %d.%d OK (minimum %d.%d)\n",
> - guc_fw->guc_fw_major_found, guc_fw->guc_fw_minor_found,
> - guc_fw->guc_fw_major_wanted,
> guc_fw->guc_fw_minor_wanted);
> + uc_fw->major_ver_found, uc_fw->minor_ver_found,
> + uc_fw->major_ver_wanted, uc_fw->minor_ver_wanted);
>
> mutex_lock(&dev->struct_mutex);
> obj = i915_gem_object_create_from_data(dev, fw->data, fw->size);
> @@ -546,31 +557,31 @@ static void guc_fw_fetch(struct drm_device *dev, struct
> intel_guc_fw *guc_fw)
> goto fail;
> }
>
> - guc_fw->guc_fw_obj = obj;
> - guc_fw->guc_fw_size = fw->size;
> + uc_fw->uc_fw_obj = obj;
> + uc_fw->uc_fw_size = fw->size;
>
> DRM_DEBUG_DRIVER("GuC fw fetch status SUCCESS, obj %p\n",
> - guc_fw->guc_fw_obj);
> + uc_fw->uc_fw_obj);
>
> release_firmware(fw);
> - guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_SUCCESS;
> + uc_fw->fetch_status = UC_FIRMWARE_SUCCESS;
> return;
>
> fail:
> DRM_DEBUG_DRIVER("GuC fw fetch status FAIL; err %d, fw %p, obj %p\n",
> - err, fw, guc_fw->guc_fw_obj);
> + err, fw, uc_fw->uc_fw_obj);
> DRM_ERROR("Failed to fetch GuC firmware from %s (error %d)\n",
> - guc_fw->guc_fw_path, err);
> + uc_fw->uc_fw_path, err);
>
> mutex_lock(&dev->struct_mutex);
> - obj = guc_fw->guc_fw_obj;
> + obj = uc_fw->uc_fw_obj;
> if (obj)
> drm_gem_object_unreference(&obj->base);
> - guc_fw->guc_fw_obj = NULL;
> + uc_fw->uc_fw_obj = NULL;
> mutex_unlock(&dev->struct_mutex);
>
> release_firmware(fw); /* OK even if fw is NULL */
> - guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_FAIL;
> + uc_fw->fetch_status = UC_FIRMWARE_FAIL;
> }
>
> /**
> @@ -585,7 +596,7 @@ fail:
> void intel_guc_ucode_init(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> - struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
> const char *fw_path;
>
> if (!HAS_GUC_SCHED(dev))
> @@ -595,8 +606,8 @@ void intel_guc_ucode_init(struct drm_device *dev)
> fw_path = NULL;
> } else if (IS_SKYLAKE(dev)) {
> fw_path = I915_SKL_GUC_UCODE;
> - guc_fw->guc_fw_major_wanted = 4;
> - guc_fw->guc_fw_minor_wanted = 3;
> + guc_fw->major_ver_wanted = 4;
> + guc_fw->minor_ver_wanted = 3;
> } else {
> i915.enable_guc_submission = false;
> fw_path = ""; /* unknown device */
> @@ -605,23 +616,23 @@ void intel_guc_ucode_init(struct drm_device *dev)
> if (!i915.enable_guc_submission)
> return;
>
> - guc_fw->guc_dev = dev;
> - guc_fw->guc_fw_path = fw_path;
> - guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
> - guc_fw->guc_fw_load_status = GUC_FIRMWARE_NONE;
> + guc_fw->uc_dev = dev;
> + guc_fw->uc_fw_path = fw_path;
> + guc_fw->fetch_status = UC_FIRMWARE_NONE;
> + guc_fw->load_status = UC_FIRMWARE_NONE;
>
> if (fw_path == NULL)
> return;
>
> if (*fw_path == '\0') {
> DRM_ERROR("No GuC firmware known for this platform\n");
> - guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_FAIL;
> + guc_fw->fetch_status = UC_FIRMWARE_FAIL;
> return;
> }
>
> - guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_PENDING;
> + guc_fw->fetch_status = UC_FIRMWARE_PENDING;
> DRM_DEBUG_DRIVER("GuC firmware pending, path %s\n", fw_path);
> - guc_fw_fetch(dev, guc_fw);
> + intel_uc_fw_fetch(dev, guc_fw);
> /* status must now be FAIL or SUCCESS */
> }
>
> @@ -632,17 +643,17 @@ void intel_guc_ucode_init(struct drm_device *dev)
> void intel_guc_ucode_fini(struct drm_device *dev)
> {
> struct drm_i915_private *dev_priv = dev->dev_private;
> - struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;
> + struct intel_uc_fw *guc_fw = &dev_priv->guc.guc_fw;
>
> mutex_lock(&dev->struct_mutex);
> direct_interrupts_to_host(dev_priv);
> i915_guc_submission_disable(dev);
> i915_guc_submission_fini(dev);
>
> - if (guc_fw->guc_fw_obj)
> - drm_gem_object_unreference(&guc_fw->guc_fw_obj->base);
> - guc_fw->guc_fw_obj = NULL;
> + if (guc_fw->uc_fw_obj)
> + drm_gem_object_unreference(&guc_fw->uc_fw_obj->base);
> + guc_fw->uc_fw_obj = NULL;
> mutex_unlock(&dev->struct_mutex);
>
> - guc_fw->guc_fw_fetch_status = GUC_FIRMWARE_NONE;
> + guc_fw->fetch_status = UC_FIRMWARE_NONE;
> }
> --
> 2.5.0
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
http://blog.ffwll.ch
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