On Mon, 2016-03-14 at 09:27 +0100, Maarten Lankhorst wrote:
> This makes it easier to verify correct dpll setup with only a single crtc.
> It is also useful to detect double dpll enable/disable.
>
> Changes since v1:
> - Rebase on top of Ander's dpll rework.
> - Change debugfs active to a mask.
> - Change enabled_crtcs and active_crtcs to unsigned.
>
> Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Ander Conselvan de Oliveira <conselv...@gmail.com>
> ---
> drivers/gpu/drm/i915/i915_debugfs.c | 4 ++--
> drivers/gpu/drm/i915/intel_display.c | 43 +++++++++++++++++-----------------
> -
> drivers/gpu/drm/i915/intel_dpll_mgr.c | 35 +++++++++++++++-------------
> drivers/gpu/drm/i915/intel_dpll_mgr.h | 2 +-
> 4 files changed, 43 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c
> b/drivers/gpu/drm/i915/i915_debugfs.c
> index d67ab7130c0f..f8fd30bd75bf 100644
> --- a/drivers/gpu/drm/i915/i915_debugfs.c
> +++ b/drivers/gpu/drm/i915/i915_debugfs.c
> @@ -3208,8 +3208,8 @@ static int i915_shared_dplls_info(struct seq_file *m,
> void *unused)
> struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
>
> seq_printf(m, "DPLL%i: %s, id: %i\n", i, pll->name, pll->id);
> - seq_printf(m, " crtc_mask: 0x%08x, active: %d, on: %s\n",
> - pll->config.crtc_mask, pll->active, yesno(pll
> ->on));
> + seq_printf(m, " crtc_mask: 0x%08x, active: 0x%x, on: %s\n",
> + pll->config.crtc_mask, pll->active_mask, yesno(pll
> ->on));
> seq_printf(m, " tracked hardware state:\n");
> seq_printf(m, " dpll: 0x%08x\n", pll
> ->config.hw_state.dpll);
> seq_printf(m, " dpll_md: 0x%08x\n",
> diff --git a/drivers/gpu/drm/i915/intel_display.c
> b/drivers/gpu/drm/i915/intel_display.c
> index 5a95dcf68df1..f8f02ec201b7 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -12973,7 +12973,7 @@ check_shared_dpll_state(struct drm_device *dev)
> for (i = 0; i < dev_priv->num_shared_dpll; i++) {
> struct intel_shared_dpll *pll =
> intel_get_shared_dpll_by_id(dev_priv, i);
> - int enabled_crtcs = 0, active_crtcs = 0;
> + unsigned enabled_crtcs = 0, active_crtcs = 0;
> bool active;
>
> memset(&dpll_hw_state, 0, sizeof(dpll_hw_state));
> @@ -12982,15 +12982,15 @@ check_shared_dpll_state(struct drm_device *dev)
>
> active = pll->funcs.get_hw_state(dev_priv, pll,
> &dpll_hw_state);
>
> - I915_STATE_WARN(pll->active > hweight32(pll
> ->config.crtc_mask),
> - "more active pll users than references: %i vs %i\n",
> - pll->active, hweight32(pll->config.crtc_mask));
> - I915_STATE_WARN(pll->active && !pll->on,
> - "pll in active use but not on in sw tracking\n");
> + I915_STATE_WARN(pll->active_mask & ~pll->config.crtc_mask,
> + "more active pll users than references: %x vs %x\n",
> + pll->active_mask, pll->config.crtc_mask);
>
> if (!(pll->flags & INTEL_DPLL_ALWAYS_ON)) {
> - I915_STATE_WARN(pll->on && !pll->active,
> - "pll in on but not on in use in sw tracking\n");
> + I915_STATE_WARN(!pll->on && pll->active_mask,
> + "pll in active use but not on in sw
> tracking\n");
> + I915_STATE_WARN(pll->on && !pll->active_mask,
> + "pll is on but not used by any active crtc\n");
> I915_STATE_WARN(pll->on != active,
> "pll on state mismatch (expected %i, found
> %i)\n",
> pll->on, active);
> @@ -12998,16 +12998,17 @@ check_shared_dpll_state(struct drm_device *dev)
>
> for_each_intel_crtc(dev, crtc) {
> if (crtc->base.state->enable && crtc->config
> ->shared_dpll == pll)
> - enabled_crtcs++;
> - if (crtc->active && crtc->config->shared_dpll == pll)
> - active_crtcs++;
> + enabled_crtcs |= 1 << drm_crtc_index(&crtc
> ->base);
> + if (crtc->base.state->active && crtc->config
> ->shared_dpll == pll)
> + active_crtcs |= 1 << drm_crtc_index(&crtc
> ->base);
> }
> - I915_STATE_WARN(pll->active != active_crtcs,
> - "pll active crtcs mismatch (expected %i, found %i)\n",
> - pll->active, active_crtcs);
> - I915_STATE_WARN(hweight32(pll->config.crtc_mask) !=
> enabled_crtcs,
> - "pll enabled crtcs mismatch (expected %i, found %i)\n",
> - hweight32(pll->config.crtc_mask), enabled_crtcs);
> +
> + I915_STATE_WARN(pll->active_mask != active_crtcs,
> + "pll active crtcs mismatch (expected %x, found %x)\n",
> + pll->active_mask, active_crtcs);
> + I915_STATE_WARN(pll->config.crtc_mask != enabled_crtcs,
> + "pll enabled crtcs mismatch (expected %x, found %x)\n",
> + pll->config.crtc_mask, enabled_crtcs);
>
> I915_STATE_WARN(pll->on && memcmp(&pll->config.hw_state,
> &dpll_hw_state,
> sizeof(dpll_hw_state)),
> @@ -15720,14 +15721,12 @@ static void intel_modeset_readout_hw_state(struct
> drm_device *dev)
>
> pll->on = pll->funcs.get_hw_state(dev_priv, pll,
> &pll->config.hw_state);
> - pll->active = 0;
> pll->config.crtc_mask = 0;
> for_each_intel_crtc(dev, crtc) {
> - if (crtc->active && crtc->config->shared_dpll == pll)
> {
> - pll->active++;
> + if (crtc->active && crtc->config->shared_dpll == pll)
> pll->config.crtc_mask |= 1 << crtc->pipe;
> - }
> }
> + pll->active_mask = pll->config.crtc_mask;
>
> DRM_DEBUG_KMS("%s hw state readout: crtc_mask 0x%08x, on
> %i\n",
> pll->name, pll->config.crtc_mask, pll->on);
> @@ -15851,7 +15850,7 @@ intel_modeset_setup_hw_state(struct drm_device *dev)
> for (i = 0; i < dev_priv->num_shared_dpll; i++) {
> struct intel_shared_dpll *pll = &dev_priv->shared_dplls[i];
>
> - if (!pll->on || pll->active)
> + if (!pll->on || pll->active_mask)
> continue;
>
> DRM_DEBUG_KMS("%s enabled but not in use, disabling\n", pll
> ->name);
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> index 4b636c47e8e3..e5f67efec32d 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
> @@ -90,7 +90,7 @@ void intel_prepare_shared_dpll(struct intel_crtc *crtc)
> return;
>
> WARN_ON(!pll->config.crtc_mask);
> - if (pll->active == 0) {
> + if (pll->active_mask == 0) {
> DRM_DEBUG_DRIVER("setting up %s\n", pll->name);
> WARN_ON(pll->on);
> assert_shared_dpll_disabled(dev_priv, pll);
> @@ -112,18 +112,23 @@ void intel_enable_shared_dpll(struct intel_crtc *crtc)
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_shared_dpll *pll = crtc->config->shared_dpll;
> + unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base);
> + unsigned old_mask = pll->active_mask;
>
> if (WARN_ON(pll == NULL))
> return;
>
> - if (WARN_ON(pll->config.crtc_mask == 0))
> + if (WARN_ON(!(pll->config.crtc_mask & crtc_mask)) ||
> + WARN_ON(pll->active_mask & crtc_mask))
> return;
>
> - DRM_DEBUG_KMS("enable %s (active %d, on? %d) for crtc %d\n",
> - pll->name, pll->active, pll->on,
> + pll->active_mask |= crtc_mask;
> +
> + DRM_DEBUG_KMS("enable %s (active %x, on? %d) for crtc %d\n",
> + pll->name, pll->active_mask, pll->on,
> crtc->base.base.id);
>
> - if (pll->active++) {
> + if (old_mask) {
> WARN_ON(!pll->on);
> assert_shared_dpll_enabled(dev_priv, pll);
> return;
> @@ -142,6 +147,7 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc)
> struct drm_device *dev = crtc->base.dev;
> struct drm_i915_private *dev_priv = dev->dev_private;
> struct intel_shared_dpll *pll = crtc->config->shared_dpll;
> + unsigned crtc_mask = 1 << drm_crtc_index(&crtc->base);
>
> /* PCH only available on ILK+ */
> if (INTEL_INFO(dev)->gen < 5)
> @@ -150,21 +156,18 @@ void intel_disable_shared_dpll(struct intel_crtc *crtc)
> if (pll == NULL)
> return;
>
> - if (WARN_ON(!(pll->config.crtc_mask & (1 << drm_crtc_index(&crtc
> ->base)))))
> + if (WARN_ON(!(pll->config.crtc_mask & crtc_mask)))
> return;
>
> - DRM_DEBUG_KMS("disable %s (active %d, on? %d) for crtc %d\n",
> - pll->name, pll->active, pll->on,
> + DRM_DEBUG_KMS("disable %s (active %x, on? %d) for crtc %d\n",
> + pll->name, pll->active_mask, pll->on,
> crtc->base.base.id);
>
> - if (WARN_ON(pll->active == 0)) {
> - assert_shared_dpll_disabled(dev_priv, pll);
> - return;
> - }
> -
> assert_shared_dpll_enabled(dev_priv, pll);
> WARN_ON(!pll->on);
> - if (--pll->active)
> +
> + pll->active_mask &= ~crtc_mask;
> + if (pll->active_mask)
> return;
>
> DRM_DEBUG_KMS("disabling %s\n", pll->name);
> @@ -197,10 +200,10 @@ intel_find_shared_dpll(struct intel_crtc *crtc,
> if (memcmp(&crtc_state->dpll_hw_state,
> &shared_dpll[i].hw_state,
> sizeof(crtc_state->dpll_hw_state)) == 0) {
> - DRM_DEBUG_KMS("CRTC:%d sharing existing %s (crtc mask
> 0x%08x, ative %d)\n",
> + DRM_DEBUG_KMS("CRTC:%d sharing existing %s (crtc mask
> 0x%08x, active %x)\n",
> crtc->base.base.id, pll->name,
> shared_dpll[i].crtc_mask,
> - pll->active);
> + pll->active_mask);
> return pll;
> }
> }
> diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.h
> b/drivers/gpu/drm/i915/intel_dpll_mgr.h
> index 1d341472f8b0..89c5ada1a315 100644
> --- a/drivers/gpu/drm/i915/intel_dpll_mgr.h
> +++ b/drivers/gpu/drm/i915/intel_dpll_mgr.h
> @@ -115,7 +115,7 @@ struct intel_shared_dpll_funcs {
> struct intel_shared_dpll {
> struct intel_shared_dpll_config config;
>
> - int active; /* count of number of active CRTCs (i.e. DPMS on) */
> + unsigned active_mask; /* mask of active CRTCs (i.e. DPMS on) */
> bool on; /* is the PLL actually active? Disabled during modeset */
> const char *name;
> /* should match the index in the dev_priv->shared_dplls array */
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