With the preceding fixes power well support should be functional on
Broxton, I could enter/exit DC5 without problems.
This reverts commit 18024199579882265653bfe9e2b1a3dcb5697cd9.
CC: Matt Roper <matthew.d.ro...@intel.com>
Signed-off-by: Imre Deak <imre.d...@intel.com>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 5 -----
1 file changed, 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 342f997..4441734 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -1948,11 +1948,6 @@ sanitize_disable_power_well_option(const struct
drm_i915_private *dev_priv,
if (disable_power_well >= 0)
return !!disable_power_well;
- if (IS_BROXTON(dev_priv)) {
- DRM_DEBUG_KMS("Disabling display power well support\n");
- return 0;
- }
-
return 1;
}
--
2.5.0
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