The workaround added in c6782b76d31a ("drm/i915/gen9: Reset secondary power
well requests left on by DMC/KVMR") needs to be applied on Kabylake too as
shown by the corresponding timeout errors about power well 1 and MISC IO
power well disabling in the latest CI run.CC: Patrik Jakobsson <[email protected]> Signed-off-by: Imre Deak <[email protected]> --- drivers/gpu/drm/i915/intel_runtime_pm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c index 259f66f..1242fb5 100644 --- a/drivers/gpu/drm/i915/intel_runtime_pm.c +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c @@ -709,7 +709,7 @@ static void skl_set_power_well(struct drm_i915_private *dev_priv, DRM_DEBUG_KMS("Disabling %s\n", power_well->name); } - if (IS_SKYLAKE(dev_priv) || IS_BROXTON(dev_priv)) + if (IS_GEN9(dev_priv)) gen9_sanitize_power_well_requests(dev_priv, power_well); } -- 2.5.0 _______________________________________________ Intel-gfx mailing list [email protected] https://lists.freedesktop.org/mailman/listinfo/intel-gfx
