With the removal of cs-based flips all mmio waits will
finish without requiring the reset counter, because the
waits will complete during gpu reset.
Signed-off-by: Maarten Lankhorst <maarten.lankho...@linux.intel.com>
Reviewed-by: Patrik Jakobsson <patrik.jakobs...@linux.intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 9 ---------
drivers/gpu/drm/i915/intel_drv.h | 3 ---
2 files changed, 12 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
index d0653f87a53a..e6d3721eeda3 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3180,14 +3180,6 @@ void intel_finish_reset(struct drm_i915_private
*dev_priv)
static bool intel_crtc_has_pending_flip(struct drm_crtc *crtc)
{
- struct drm_device *dev = crtc->dev;
- struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
- unsigned reset_counter;
-
- reset_counter = i915_reset_counter(&to_i915(dev)->gpu_error);
- if (intel_crtc->reset_counter != reset_counter)
- return false;
-
return !list_empty_careful(&to_intel_crtc(crtc)->flip_work);
}
@@ -11288,7 +11280,6 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
intel_fbc_pre_update(intel_crtc);
- intel_crtc->reset_counter = i915_reset_counter(&dev_priv->gpu_error);
schedule_work(&work->mmio_work);
mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index e7e262ac1f99..40f7925623fd 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -662,9 +662,6 @@ struct intel_crtc {
struct intel_crtc_state *config;
- /* reset counter value when the last flip was submitted */
- unsigned int reset_counter;
-
/* Access to these should be protected by dev_priv->irq_lock. */
bool cpu_fifo_underrun_disabled;
bool pch_fifo_underrun_disabled;
--
2.5.5
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