[Intel-gfx] [PATCH 5/9] drm/i915: Make ring buffer size of a LRC context configurable

[Zhi Wang]

This patch introduces an option for configuring the ring buffer size
of a LRC context after the context creation.

Signed-off-by: Zhi Wang <zhi.a.w...@intel.com>
---
 drivers/gpu/drm/i915/i915_drv.h         | 1 +
 drivers/gpu/drm/i915/i915_gem_context.c | 1 +
 drivers/gpu/drm/i915/intel_lrc.c        | 3 ++-
 3 files changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index bdf499f..a4af035 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -878,6 +878,7 @@ struct i915_gem_context {
                int pin_count;
                bool initialised;
        } engine[I915_NUM_ENGINES];
+       u32 lrc_ring_buffer_size;
 
        struct list_head link;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c 
b/drivers/gpu/drm/i915/i915_gem_context.c
index a3b11aa..1663981 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -295,6 +295,7 @@ __create_hw_context(struct drm_device *dev,
        ctx->remap_slice = ALL_L3_SLICES(dev_priv);
 
        ctx->hang_stats.ban_period_seconds = DRM_I915_CTX_BAN_PERIOD;
+       ctx->lrc_ring_buffer_size = 4 * PAGE_SIZE;
 
        return ctx;
 
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 5c191a1..72a0cca 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -2484,7 +2484,8 @@ static int execlists_context_deferred_alloc(struct 
i915_gem_context *ctx,
                return PTR_ERR(ctx_obj);
        }
 
-       ringbuf = intel_engine_create_ringbuffer(engine, 4 * PAGE_SIZE);
+       ringbuf = intel_engine_create_ringbuffer(engine,
+                       ctx->lrc_ring_buffer_size);
        if (IS_ERR(ringbuf)) {
                ret = PTR_ERR(ringbuf);
                goto error_deref_obj;
-- 
1.9.1

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