> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of > Maciej Fijalkowski > Sent: 22 August 2025 20:46 > To: [email protected] > Cc: [email protected]; Nguyen, Anthony L <[email protected]>; > Kitszel, Przemyslaw <[email protected]>; Karlsson, Magnus > <[email protected]>; Fijalkowski, Maciej > <[email protected]> > Subject: [Intel-wired-lan] [PATCH iwl-net] i40e: remove redundant memory > barrier when cleaning Tx descs > > i40e has a feature which writes to memory location last descriptor > successfully sent. Memory barrier in i40e_clean_tx_irq() was used to avoid > forward-reading descriptor fields in case DD bit was not set. > Having mentioned feature in place implies that such situation will not happen > as we know in advance how many descriptors HW has dealt with. > > Besides, this barrier placement was wrong. Idea is to have this protection > *after* reading DD bit from HW descriptor, not before. > Digging through git history showed me that indeed barrier was before DD bit > check, anyways the commit introducing i40e_get_head() should have wiped it > out altogether. > > Also, there was one commit doing s/read_barrier_depends/smp_rmb when get head > feature was already in place, but it was only theoretical based on ixgbe > experiences, which is different in these terms as that driver has to read DD > bit from HW descriptor. > > Fixes: 1943d8ba9507 ("i40e/i40evf: enable hardware feature head write back") > Signed-off-by: Maciej Fijalkowski <[email protected]> > --- > drivers/net/ethernet/intel/i40e/i40e_txrx.c | 3 --- > 1 file changed, 3 deletions(-) >
Tested-by: Rinitha S <[email protected]> (A Contingent worker at Intel)
