Sat, Mar 21, 2026 at 11:26:20PM +0100, [email protected] wrote: >Extend the DPLL subsystem with a new DPLL type, DPLL_TYPE_TXC, >representing devices that drive a transmit reference clock. Certain >PHYs, MACs and SerDes blocks use a dedicated TX reference clock for >link operation, and this clock domain is distinct from PPS- and >EEC-driven synchronization sources. Defining a dedicated type allows >user space and drivers to correctly classify and configure DPLLs >intended for TX clock generation. > >The corresponding netlink specification is updated to expose "txc" > >Reviewed-by: Arkadiusz Kubalewski <[email protected]> >Reviewed-by: Aleksandr Loktionov <[email protected]> >Signed-off-by: Grzegorz Nitka <[email protected]>
Reviewed-by: Jiri Pirko <[email protected]>
