On Tue, Mar 24, 2026 at 04:35:42PM +0100, Aleksandr Loktionov wrote:
> ice_link_mode_str_high[] lacks entries for phy_type_high bits 5-14
> (all 200G PHY types on E825C); ice_dump_phy_type() prints nothing for
> them when ICE_DBG_LINK is set (e.g. 'ethtool -s ethX msglvl 0x10').
> The loop also iterates all 64 bits against a 5-entry array - undefined
> behaviour for any matched bit beyond the end.  Add strings for bits
> 5-14 and guard the loop with ARRAY_SIZE(), falling back to "unknown"
> for unrecognised bits.
> 
> ICE_PHY_TYPE_HIGH_200G_AUI8_AOC_ACC (bit 13) and 200G_AUI8 (bit 14)
> were absent from ice_adminq_cmd.h; ICE_PHY_TYPE_HIGH_MAX_INDEX capped
> at 12 caused ice_update_phy_type() to skip them entirely, leaving both
> invisible to 200G speed requests.  Add the definitions and bump
> MAX_INDEX to 14.
> 
> Wire the two new types throughout the driver:
> - ice_get_media_type(): handle all ten 200G phy_type_high values so
>   E825C ports no longer return ICE_MEDIA_UNKNOWN.  AOC_ACC interfaces
>   map to FIBER; bare AUI4/AUI8 to DA with cage, else BACKPLANE
>   (matching existing AUI2/CAUI2 logic); CR4_PAM4 to DA; SR4/FR4/LR4/
>   DR4 to FIBER; KR4_PAM4 to BACKPLANE.
> - ice_get_link_speed_based_on_phy_type(): return ICE_AQ_LINK_SPEED_200GB
>   for both new types so ice_update_phy_type() enables them correctly.
> - phy_type_high_lkup[13,14]: AUI8 is 8-lane 25G-per-lane; no
>   200000baseSR8/CR8 ethtool modes exist yet, so approximate with
>   SR4_Full/CR4_Full - matching AUI4 at indices 11-12.  FIXME once
>   those link modes land upstream.
> - ICE_PHY_TYPE_HIGH_MASK_200G: add bits 13-14 for the minimum-speed
>   floor in ice_mask_min_supported_speeds().
> 
> Suggested-by: Paul Greenwalt <[email protected]>
> Signed-off-by: Aleksandr Loktionov <[email protected]>
> Cc: Simon Horman <[email protected]>
> Cc: Paul Menzel <[email protected]>
> ---
> v3 -> v4: add ARRAY_SIZE() OOB guard in ice_dump_phy_type(); cover all
>           ten 200G phy_type_high values in ice_get_media_type(); add FIXME
>           to lkup[13..14] for missing SR8/CR8 modes; rename subject
>           fix subject; fix debug enable example (ethtool, not modprobe);
>           add AUI8 speed mapping, lkup[13-14], MASK_200G bits 13-14,
>           and AUI8->SR4/CR4 approximation comment
> v1 -> v2: add ICE_PHY_TYPE_HIGH_MAX_INDEX update

Thanks for the updates.

Reviewed-by: Simon Horman <[email protected]>

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