> -----Original Message----- > From: Intel-wired-lan <[email protected]> On Behalf Of > Arkadiusz Kubalewski > Sent: Friday, May 8, 2026 4:09 AM > To: [email protected] > Cc: [email protected]; [email protected]; [email protected]; > [email protected]; Kubalewski, Arkadiusz > <[email protected]>; Loktionov, Aleksandr > <[email protected]>; Nguyen, Anthony L > <[email protected]>; Fodor, Zoltan <[email protected]>; > [email protected]; Kitszel, Przemyslaw <[email protected]>; > Grinberg, Vitaly <[email protected]> > Subject: [Intel-wired-lan] [PATCH iwl-next v12] ice: add support for > unmanaged DPLL on E830 NIC > > Hardware variants of E830 may support an unmanaged DPLL where the > configuration is hardcoded within the hardware and firmware, meaning > users cannot modify settings. However, users are able to check the DPLL > lock status and obtain configuration information through the Linux DPLL > and devlink health subsystem. > > Availability of 'loss of lock' health status code determines if such > support is available, if true, register single DPLL device with 1 input > and 1 output and provide hardcoded/read only properties of a pin and > DPLL device. User is only allowed to check DPLL device status and receive > notifications on DPLL lock status change. > > When present, the DPLL device locks to an external signal provided > through the PCIe/OCP pin. The expected input signal is 1PPS > (1 Pulse Per Second) embedded on a 10MHz reference clock. > The DPLL produces output: > - for MAC (Media Access Control) & PHY (Physical Layer) clocks, > - 1PPS for synchronization of onboard PHC (Precision Hardware Clock) timer. > > Reviewed-by: Aleksandr Loktionov <[email protected]> > Reviewed-by: Paul Menzel <[email protected]> > Signed-off-by: Grzegorz Nitka <[email protected]> > Signed-off-by: Arkadiusz Kubalewski <[email protected]> > --- > v12: > - remove HAVE_DPLL_ESYNC ifdef > - guard ice_dpll_lock_state_set_unmanaged() call in health event handler > with test_bit(ICE_FLAG_DPLL, pf->flags) and pf->dplls.unmanaged > - add NULL guards for first/second dpll in ice_dpll_deinit_direct_pins() > - add comments explaining intentional continue in > ice_dpll_init_info_direct_pins() for unmanaged pins > v11: > - rebase and fix conflicts > --- > .../device_drivers/ethernet/intel/ice.rst | 83 +++++ > .../net/ethernet/intel/ice/devlink/health.c | 6 + > .../net/ethernet/intel/ice/ice_adminq_cmd.h | 12 + > drivers/net/ethernet/intel/ice/ice_common.c | 136 ++++++++ > drivers/net/ethernet/intel/ice/ice_common.h | 8 + > drivers/net/ethernet/intel/ice/ice_dpll.c | 314 ++++++++++++++++-- > drivers/net/ethernet/intel/ice/ice_dpll.h | 10 + > drivers/net/ethernet/intel/ice/ice_main.c | 11 +- > drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 46 +++ > drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 1 + > 10 files changed, 604 insertions(+), 23 deletions(-)
Tested-by: Sunitha Mekala <[email protected]> (A Contingent worker at Intel)
