> -----Original Message----- > From: Petr Oros <[email protected]> > Sent: Thursday, September 17, 2026 12:03 PM > To: [email protected] > Cc: Oros, Petr <[email protected]>; [email protected]; Nguyen, Anthony L > <[email protected]>; Kitszel, Przemyslaw > <[email protected]>; Andrew Lunn <[email protected]>; > David > S. Miller <[email protected]>; Eric Dumazet <[email protected]>; Jakub > Kicinski <[email protected]>; Paolo Abeni <[email protected]>; Simon Horman > <[email protected]>; Kubalewski, Arkadiusz <[email protected]>; > [email protected]; [email protected] > Subject: [PATCH iwl-net 1/2] ice: fix DPLL registration on boards without the > SMA clock mux > > The SMA and U.FL connectors of an E810-C timing board are routed by a > PCA9575 GPIO expander, and ice_dpll_init_info_sw_pins() reaches it through > ice_read_sma_ctrl(). On a board that carries a CGU but no such expander the > netlist lookup fails with -ENXIO, which aborts > ice_dpll_init_info() and with it the whole DPLL registration: > > ice 0000:cc:00.0: ice_dpll_init_info - fail: d->inputs:... > ice 0000:cc:00.0: DPLLs init failure err:-6 > > Userspace loses the EEC and PPS devices, every CGU pin and the recovered > clock pin. > > The netlist describes the mux with a clock mux node, which > ice_init_feature_support() already turns into ICE_F_SMA_CTRL. Key the > software controlled pins on that flag. Without the mux the SMA wrappers stay > inputs, the state the mux path programs at init anyway, and > do not > advertise DIRECTION_CAN_CHANGE. The U.FL pins are the other leg of the mux, > so they are hidden, and the outgoing CGU pins stay visible as > REF-SMA1 and REF-SMA2/U.FL2. > > The layout is not exotic, the E810_C827_SyncE_SFP_SEC configuration in > Intel's 4.80 NVM package has no clock mux node either. Such boards worked > until the SMA and U.FL redesign moved the expander access > into the DPLL > init path. > > Fixes: 2dd5d03c77e2 ("ice: redesign dpll sma/u.fl pins control") > Cc: [email protected] > Signed-off-by: Petr Oros <[email protected]> > --- > drivers/net/ethernet/intel/ice/ice_dpll.c | 20 +++++++++++++++++--- > 1 file changed, 17 insertions(+), 3 deletions(-)
Tested-by: Alexander Nowlin <[email protected]>
