International SAP Projects Hot Job for the position of Verification Engineer @ San Jose/CA

[Sandeep Kumar]

Hi Associate,

Currently, I am recruiting candidates for one of my requirement as mentioned below. If you have a matching profile, please send me the updated resume along with contact details at the earliest.

Job Title	Verification Engineer
Project Location	San Jose CA
Duration	12 months /Contract

 
Skills Required and Job Description:

Note - There is Three Openings in San Jose or Irvine CA and Austin/Texas Must - Design verification engineer  who has experience with systemverilog, OVM and UVM and test-bench Project Details - Design verification engineer  who has experience with systemverilog, OVM and UVM and test-bench. In this role you will define the verification plan and functional coverage requirements. You will create test bench, tests and coverage groups, checkers and SystemVerilog assertions. You should have experience creating system level test cases, analyzing functional coverage and writing support tools and scripts.  Requirements: Experience in verifying ARM based SoCs Strong understanding of high speed protocols such as PCIE, USB3.0, etc. Experience with SystemVerilog and SVA Experience with verification methodology such as SV OVM or UVM Good scripting skills with Perl and Tcl Experience with Altera is a plus Team player with good communication and documentation skills Education:  Minimum BS in EE/CS or related field.

Note: Please use update button on top of this email to upload your hotlist so that we don't send you unwanted Reqs. 

Thanks & Regards,

 

Sandeep Kumar

(Technical Resource Specialist)

.......consulting redefined Ramy Infotech, Inc

Renaissance Business Center, 1851 McCarthy Blvd, Suite 107, Milpitas, CA 95035

Phone : 408-317-9256 EXT :331

Fax : 408-273-6834

Email : sandeep.ku...@ramyinfotech.com

URL : www.ramyinfotech.com

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