On Fri, Jul 31, 2015 at 08:55:37AM +0100, Yong Wu wrote: > About the AP bits, I may have to add a new quirk for it... > > Current I add AP in pte like this: > #define ARM_SHORT_PTE_RD_WR (3 << 4) > #define ARM_SHORT_PTE_RDONLY BIT(9) > > pteprot |= ARM_SHORT_PTE_RD_WR; > > > If(!(prot & IOMMU_WRITE) && (prot & IOMMU_READ)) > > > pteprot |= ARM_SHORT_PTE_RDONLY; > > The problem is that the BIT(9) in the level1 and level2 pagetable of our > HW has been used for PA[32] that is for the dram size over 4G.
Aha, now *thats* a case of page-table abuse! > so I had to add a quirk to disable bit9 while RDONLY case. > (If BIT9 isn't disabled, the HW treat it as the PA[32] case then it will > translation fault..) > > like: IO_PGTABLE_QUIRK_SHORT_MTK ? Given that you don't have XN either, maybe IO_PGTABLE_QUIRK_NO_PERMS? When set, IOMMU_READ/WRITE/EXEC are ignored and the mapping will never generate a permission fault. Will _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
