On Fri, Apr 15, 2016 at 8:55 PM, Shaohua Li <s...@fb.com> wrote:

> Fair enough, it makes sense to ignore the DAC overhead. My point is the
> cache case should respect the limit, since devices might not be able to
> handle DMA64. Even without IOMMU, we use GFP_DMA32 or swiotlb to
> guarantee DMA address is in range.

Absolutely, the cache should respect the limit.  That'll be fixed in
the next version; sorry I forgot to do it in this revision.

> For the 'force DMA32' logic in
> intel-iommu, it's in the code in day one, but I can't remember the
> reason. My guess is it's to workaround driver/device bugs. I'd suggest
> just deleting the logic and let cache only handle DMA64.

Having looked at this further, DMA64 limits get cut down to the max
address the IOMMU supports (in intel_alloc_iova()).  In principle,
DMA32 (or close to it) might end up as the limit even for DMA64.  So
it seems cleaner to just flush the rcache if we can't allocate; that
takes care of everything.
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