On Fri, May 11, 2018 at 02:55:47PM +0100, Catalin Marinas wrote: > On systems with a Cache Writeback Granule (CTR_EL0.CWG) greater than > ARCH_DMA_MINALIGN, DMA cache maintenance on sub-CWG ranges is not safe, > leading to data corruption. If such configuration is detected, the > kernel will force swiotlb bounce buffering for all non-coherent devices.
Per the previous discussion I understand that so far this is a purely theoretical condition. Given that I'd rather avoid commiting this patch and just refuse too boot in this case. In a merge window or two I plan to have a noncoherent flag in struct device, at which point we can handle this entirely in common code. _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
