On Wed, Mar 20, 2019 at 08:14:56AM +0000, Suthikulpanit, Suravee wrote:
> When AVIC is enabled and the VM has discrete device assignment,
> the interrupt remapping table (IRT) is used to keep track of which
> destination APIC ID the IOMMU will inject the device interrput to.
>
> This means every time a vcpu is blocked or context-switched (i.e.
> vcpu_blocking/unblocking() and vcpu_load/put()), the information
> in IRT must be updated and the IOMMU IRT flush command must be
> issued.
>
> The current implementation flushes IOMMU IRT every time an entry
> is modified. If the assigned device has large number of interrupts
> (hence large number of entries), this would add large amount of
> overhead to vcpu context-switch. Instead, this can be optmized by
> only flush IRT once per vcpu context-switch per device after all
> IRT entries are modified.
>
> The function amd_iommu_update_ga() is refactored to only update
> IRT entry, while the amd_iommu_sync_ga() is introduced to allow
> IRT flushing to be done separately.
>
> Cc: Joerg Roedel <j...@8bytes.org>
> Cc: Radim Krčmář <rkrc...@redhat.com>
> Cc: Paolo Bonzini <pbonz...@redhat.com>
> Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com>
> ---
> arch/x86/kvm/svm.c | 35 ++++++++++++++++++++++++++++++++++-
> drivers/iommu/amd_iommu.c | 20 +++++++++++++++++---
> include/linux/amd-iommu.h | 13 ++++++++++---
> 3 files changed, 61 insertions(+), 7 deletions(-)
For the IOMMU parts:
Acked-by: Joerg Roedel <jroe...@suse.de>
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