On Mon, Sep 30, 2019 at 9:11 AM Robin Murphy <robin.mur...@arm.com> wrote: > > Midgard GPUs have ACE-Lite master interfaces which allows systems to > integrate them in an I/O-coherent manner. It seems that from the GPU's > viewpoint, the rest of the system is its outer shareable domain, and so > even when snoop signals are wired up, they are only emitted for outer > shareable accesses. As such, setting the TTBR_SHARE_OUTER bit does > indeed get coherent pagetable walks working nicely for the coherent > T620 in the Arm Juno SoC. > > Exploiting coherency for data accesses is more of a challenge, since > not only do we need to get the GPU MMU attributes right but we'd also > have to avoid pgprot_writecombine creating an attribute mismatch on > the CPU side, so we won't try wiring that up just yet. > > Reviewed-by: Steven Price <steven.pr...@arm.com> > Signed-off-by: Robin Murphy <robin.mur...@arm.com> > --- > drivers/iommu/io-pgtable-arm.c | 3 +++ > 1 file changed, 3 insertions(+)
Reviewed-by: Rob Herring <r...@kernel.org> _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
