On Fri, 25 Oct 2019 06:19:29 +0000 "Tian, Kevin" <[email protected]> wrote:
> > From: Jacob Pan [mailto:[email protected]] > > Sent: Friday, October 25, 2019 3:55 AM > > > > From: Lu Baolu <[email protected]> > > > > Enabling IOMMU in a guest requires communication with the host > > driver for certain aspects. Use of PASID ID to enable Shared Virtual > > Addressing (SVA) requires managing PASID's in the host. VT-d 3.0 > > spec provides a Virtual Command Register (VCMD) to facilitate this. > > Writes to this register in the guest are trapped by QEMU which > > proxies the call to the host driver. > > > > This virtual command interface consists of a capability register, > > a virtual command register, and a virtual response register. Refer > > to section 10.4.42, 10.4.43, 10.4.44 for more information. > > > > This patch adds the enlightened PASID allocation/free interfaces > > via the virtual command interface. > > > > Cc: Ashok Raj <[email protected]> > > Cc: Jacob Pan <[email protected]> > > Cc: Kevin Tian <[email protected]> > > Signed-off-by: Liu Yi L <[email protected]> > > Signed-off-by: Lu Baolu <[email protected]> > > Signed-off-by: Jacob Pan <[email protected]> > > Reviewed-by: Eric Auger <[email protected]> > > --- > > drivers/iommu/intel-pasid.c | 56 > > +++++++++++++++++++++++++++++++++++++++++++++ > > drivers/iommu/intel-pasid.h | 13 ++++++++++- > > include/linux/intel-iommu.h | 2 ++ > > 3 files changed, 70 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/iommu/intel-pasid.c > > b/drivers/iommu/intel-pasid.c index 040a445be300..d81e857d2b25 > > 100644 --- a/drivers/iommu/intel-pasid.c > > +++ b/drivers/iommu/intel-pasid.c > > @@ -63,6 +63,62 @@ void *intel_pasid_lookup_id(int pasid) > > return p; > > } > > > > +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int > > *pasid) +{ > > + unsigned long flags; > > + u8 status_code; > > + int ret = 0; > > + u64 res; > > + > > + raw_spin_lock_irqsave(&iommu->register_lock, flags); > > + dmar_writeq(iommu->reg + DMAR_VCMD_REG, > > VCMD_CMD_ALLOC); > > + IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, > > + !(res & VCMD_VRSP_IP), res); > > + raw_spin_unlock_irqrestore(&iommu->register_lock, flags); > > + > > should we handle VCMD_VRSP_IP here? VCMD_VRSP_IP is checked above, if it times out, you will get panic. Not sure whatelse to do? > > > + status_code = VCMD_VRSP_SC(res); > > + switch (status_code) { > > + case VCMD_VRSP_SC_SUCCESS: > > + *pasid = VCMD_VRSP_RESULT(res); > > + break; > > + case VCMD_VRSP_SC_NO_PASID_AVAIL: > > + pr_info("IOMMU: %s: No PASID available\n", iommu- > > >name); > > + ret = -ENOMEM; > > + break; > > + default: > > + ret = -ENODEV; > > + pr_warn("IOMMU: %s: Unexpected error code %d\n", > > + iommu->name, status_code); > > + } > > + > > + return ret; > > +} > > + > > +void vcmd_free_pasid(struct intel_iommu *iommu, unsigned int pasid) > > +{ > > + unsigned long flags; > > + u8 status_code; > > + u64 res; > > + > > + raw_spin_lock_irqsave(&iommu->register_lock, flags); > > + dmar_writeq(iommu->reg + DMAR_VCMD_REG, (pasid << 8) | > > VCMD_CMD_FREE); > > define a macro for pasid offset. > will do. > > + IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, > > + !(res & VCMD_VRSP_IP), res); > > + raw_spin_unlock_irqrestore(&iommu->register_lock, flags); > > + > > + status_code = VCMD_VRSP_SC(res); > > + switch (status_code) { > > + case VCMD_VRSP_SC_SUCCESS: > > + break; > > + case VCMD_VRSP_SC_INVALID_PASID: > > + pr_info("IOMMU: %s: Invalid PASID\n", iommu->name); > > + break; > > + default: > > + pr_warn("IOMMU: %s: Unexpected error code %d\n", > > + iommu->name, status_code); > > + } > > +} > > + > > /* > > * Per device pasid table management: > > */ > > diff --git a/drivers/iommu/intel-pasid.h > > b/drivers/iommu/intel-pasid.h index fc8cd8f17de1..e413e884e685 > > 100644 --- a/drivers/iommu/intel-pasid.h > > +++ b/drivers/iommu/intel-pasid.h > > @@ -23,6 +23,16 @@ > > #define is_pasid_enabled(entry) (((entry)->lo >> 3) > > & 0x1) #define get_pasid_dir_size(entry) (1 << > > ((((entry)->lo >> 9) & 0x7) + 7)) > > > > +/* Virtual command interface for enlightened pasid management. */ > > +#define VCMD_CMD_ALLOC 0x1 > > +#define VCMD_CMD_FREE 0x2 > > +#define VCMD_VRSP_IP 0x1 > > +#define VCMD_VRSP_SC(e) (((e) >> 1) & 0x3) > > +#define VCMD_VRSP_SC_SUCCESS 0 > > +#define VCMD_VRSP_SC_NO_PASID_AVAIL 1 > > +#define VCMD_VRSP_SC_INVALID_PASID 1 > > +#define VCMD_VRSP_RESULT(e) (((e) >> 8) & 0xfffff) > > + > > /* > > * Domain ID reserved for pasid entries programmed for first-level > > * only and pass-through transfer modes. > > @@ -95,5 +105,6 @@ int intel_pasid_setup_pass_through(struct > > intel_iommu *iommu, > > struct device *dev, int pasid); > > void intel_pasid_tear_down_entry(struct intel_iommu *iommu, > > struct device *dev, int pasid); > > - > > +int vcmd_alloc_pasid(struct intel_iommu *iommu, unsigned int > > *pasid); +void vcmd_free_pasid(struct intel_iommu *iommu, unsigned > > int pasid); #endif /* __INTEL_PASID_H */ > > diff --git a/include/linux/intel-iommu.h > > b/include/linux/intel-iommu.h index 2e1bed9b7eef..1d4b8dcdc5d8 > > 100644 --- a/include/linux/intel-iommu.h > > +++ b/include/linux/intel-iommu.h > > @@ -161,6 +161,7 @@ > > #define ecap_smpwc(e) (((e) >> 48) & 0x1) > > #define ecap_flts(e) (((e) >> 47) & 0x1) > > #define ecap_slts(e) (((e) >> 46) & 0x1) > > +#define ecap_vcs(e) (((e) >> 44) & 0x1) > > #define ecap_smts(e) (((e) >> 43) & 0x1) > > #define ecap_dit(e) ((e >> 41) & 0x1) > > #define ecap_pasid(e) ((e >> 40) & 0x1) > > @@ -282,6 +283,7 @@ > > > > /* PRS_REG */ > > #define DMA_PRS_PPR ((u32)1) > > +#define DMA_VCS_PAS ((u64)1) > > > > #define IOMMU_WAIT_OP(iommu, offset, op, cond, sts) > > \ > > do > > { > > \ -- 2.7.4 > [Jacob Pan] _______________________________________________ iommu mailing list [email protected] https://lists.linuxfoundation.org/mailman/listinfo/iommu
