On 2020-03-24 11:55 am, John Garry wrote:
On 24/03/2020 10:43, Marc Zyngier wrote:
On Tue, 24 Mar 2020 09:18:10 +0000
John Garry<john.ga...@huawei.com> wrote:
On 23/03/2020 09:16, Marc Zyngier wrote:
+ Julien, Mark
Hi Marc,
Time to enable pseudo-NMIs in the PMUv3 driver...
Do you know if there is any plan for this?
There was. Julien Thierry has a bunch of patches for that [1], but
they > needs
reviving.
So those patches still apply cleanly (apart from the kvm patch, which
I can skip, I suppose) and build, so I can try this I figure. Is
there anything else which I should ensure or know about? Apart from
enable CONFIG_ARM64_PSUEDO_NMI.
You need to make sure that your firmware sets SCR_EL3.FIQ to 1. My D05
has it set to 0, preventing me from being able to use the feature
(hint, nudge...;-).
Yeah, apparently it's set on our D06CS board, but I just need to double
check the FW version with our FW guy.
Hopefully you saw the help for CONFIG_ARM64_PSUEDO_NMI already, but
since it's not been called out:
This high priority configuration for interrupts needs to be
explicitly enabled by setting the kernel parameter
"irqchip.gicv3_pseudo_nmi" to 1.
FWIW I believe is is still on the plan for someone here to dust off the
PMU pNMI patches at some point.
Robin.
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