From: David Woodhouse <d...@amazon.co.uk>
Now that external interrupt affinity can be limited to the range of
CPUs that can be reached through legacy IOAPIC RTEs and MSI, it is
possible to use additional CPUs.
Signed-off-by: David Woodhouse <d...@amazon.co.uk>
---
arch/x86/kernel/apic/apic.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/arch/x86/kernel/apic/apic.c b/arch/x86/kernel/apic/apic.c
index 069f5e9f1d28..750a92464bec 100644
--- a/arch/x86/kernel/apic/apic.c
+++ b/arch/x86/kernel/apic/apic.c
@@ -1881,8 +1881,6 @@ static __init void try_to_enable_x2apic(int remap_mode)
*/
x2apic_phys = 1;
}
- if (apic_limit)
- x2apic_set_max_apicid(apic_limit);
/* Build the affinity mask for interrupts that can't be remapped. */
cpumask_clear(&x86_non_ir_cpumask);
--
2.26.2
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