Hi, 2) Second issue I got (btw I have ClearFog GT 8k armada-8040 based board) is mpci ath10k card. It is found, it is enumerated, it is visible in lspci, but it fails to be initialised. Here is the log: [ 1.743754] armada8k-pcie f2600000.pcie: host bridge /cp0/pcie@f2600000 ranges: [ 1.751116] armada8k-pcie f2600000.pcie: MEM 0x00f6000000..0x00f6efffff -> 0x00f6000000 [ 1.964690] armada8k-pcie f2600000.pcie: Link up [ 1.969379] armada8k-pcie f2600000.pcie: PCI host bridge to bus 0000:00 [ 1.976026] pci_bus 0000:00: root bus resource [bus 00-ff] [ 1.981537] pci_bus 0000:00: root bus resource [mem 0xf6000000-0xf6efffff] [ 1.988462] pci 0000:00:00.0: [11ab:0110] type 01 class 0x060400 [ 1.994504] pci 0000:00:00.0: reg 0x10: [mem 0x00000000-0x000fffff] [ 2.000843] pci 0000:00:00.0: supports D1 D2 [ 2.005132] pci 0000:00:00.0: PME# supported from D0 D1 D3hot [ 2.011853] pci 0000:01:00.0: [168c:003c] type 00 class 0x028000 [ 2.018001] pci 0000:01:00.0: reg 0x10: [mem 0x00000000-0x001fffff 64bit] [ 2.025002] pci 0000:01:00.0: reg 0x30: [mem 0x00000000-0x0000ffff pref] [ 2.032111] pci 0000:01:00.0: supports D1 D2 [ 2.049409] pci 0000:00:00.0: BAR 14: assigned [mem 0xf6000000-0xf61fffff] [ 2.056322] pci 0000:00:00.0: BAR 0: assigned [mem 0xf6200000-0xf62fffff] [ 2.063142] pci 0000:00:00.0: BAR 15: assigned [mem 0xf6300000-0xf63fffff pref] [ 2.070484] pci 0000:01:00.0: BAR 0: assigned [mem 0xf6000000-0xf61fffff 64bit] [ 2.077880] pci 0000:01:00.0: BAR 6: assigned [mem 0xf6300000-0xf630ffff pref] [ 2.085135] pci 0000:00:00.0: PCI bridge to [bus 01-ff] [ 2.090384] pci 0000:00:00.0: bridge window [mem 0xf6000000-0xf61fffff] [ 2.097202] pci 0000:00:00.0: bridge window [mem 0xf6300000-0xf63fffff pref] [ 2.104539] pcieport 0000:00:00.0: Adding to iommu group 4 [ 2.110232] pcieport 0000:00:00.0: PME: Signaling with IRQ 38 [ 2.116141] pcieport 0000:00:00.0: AER: enabled with IRQ 38 [ 8.131135] ath10k_pci 0000:01:00.0: Adding to iommu group 4 [ 8.131874] ath10k_pci 0000:01:00.0: enabling device (0000 -> 0002) [ 8.132203] ath10k_pci 0000:01:00.0: pci irq msi oper_irq_mode 2 irq_mode 0 reset_mode 0 up to that point the log is the same as without SMMU enabled, except "Adding to iommu group N" lines, and IRQ being 37
Does forcing ath10k to use legacy interrupts rather than MSIs make a difference? Judging by the DT it looks like MSIs ought to be targeting the GICv2M widget, but if things somehow end up trying to use the PCIe controller's internal MSI doorbell (upstream of SMMU translation) instead, then that might account for general interrupt-related weirdness. Robin. Frankly speaking you quickly overcome here my knowledge depth, this is already way far from what I understand about PCI devices. But I tried my best to try it out what you suggested. putting 0 to /sys/bus/pci/devices/0000\:01\:00.0/msi_bus (bus of ath10k) and reloading the driver didn't make a difference with those almost same messages: [ 103.245287] ath10k_pci 0000:01:00.0: MSI/MSI-X disallowed for future drivers [ 145.938562] ath10k_pci 0000:01:00.0: pci irq legacy oper_irq_mode 1 irq_mode 0 reset_mode 0 [ 146.053590] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 146.161637] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 146.269515] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 146.453633] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 146.561589] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 146.669550] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 146.753456] ath10k_pci 0000:01:00.0: Failed to get pcie state addr: -16 [ 146.760129] ath10k_pci 0000:01:00.0: failed to setup init config: -16 [ 146.766695] ath10k_pci 0000:01:00.0: could not power on hif bus (-16) [ 146.773196] ath10k_pci 0000:01:00.0: could not probe fw (-16) lspci -v says Capabilities: [50] MSI: Enable- Count=1/8 Maskable+ 64bit- So it seems it does what you suggested, disabled the MSI. With not much differences unfortunately. =( I also compared lscpi output also with non-SMMU-dts (with which ath10k works) and SMMU-dts, and there is a difference I guess, I'm not sure how affecting it is. On non-SMMU dts host controller (served by pcieport driver) IRQ is 37 and ath10k IRQ is 82: 00:00.0 PCI bridge: Marvell Technology Group Ltd. Device 0110 (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 37 ... 01:00.0 Network controller: Qualcomm Atheros QCA986x/988x 802.11ac Wireless Network Adapter Flags: bus master, fast devsel, latency 0, IRQ 82 On SMMU dt's though both IRQ's are same and are 38: 00:00.0 PCI bridge: Marvell Technology Group Ltd. Device 0110 (prog-if 00 [Normal decode]) Flags: bus master, fast devsel, latency 0, IRQ 38 ... 01:00.0 Network controller: Qualcomm Atheros QCA986x/988x 802.11ac Wireless Network Adapter Flags: bus master, fast devsel, latency 0, IRQ 38 [ 8.221328] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 8.313362] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 8.409373] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 8.553433] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 8.641370] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 8.737979] ath10k_pci 0000:01:00.0: failed to poke copy engine: -16 [ 8.807356] ath10k_pci 0000:01:00.0: Failed to get pcie state addr: -16 [ 8.814032] ath10k_pci 0000:01:00.0: failed to setup init config: -16 [ 8.820605] ath10k_pci 0000:01:00.0: could not power on hif bus (-16) [ 8.827111] ath10k_pci 0000:01:00.0: could not probe fw (-16) Thank you! v3 -> v4 - call cfg_probe() impl hook a bit earlier which simplifies errata handling - use hi_lo_readq_relaxed() and hi_lo_writeq_relaxed() for register accessors - keep SMMU status disabled by default and enable where possible (DTS changes) - commit logs improvements and other minor fixes Hanna Hawa (1): iommu/arm-smmu: Workaround for Marvell Armada-AP806 SoC erratum #582743 Marcin Wojtas (1): arm64: dts: marvell: add SMMU support Tomasz Nowicki (2): iommu/arm-smmu: Call configuration impl hook before consuming features dt-bindings: arm-smmu: add compatible string for Marvell Armada-AP806 SMMU-500 Documentation/arm64/silicon-errata.rst | 3 ++ .../devicetree/bindings/iommu/arm,smmu.yaml | 4 ++ arch/arm64/boot/dts/marvell/armada-7040.dtsi | 28 ++++++++++++ arch/arm64/boot/dts/marvell/armada-8040.dtsi | 40 +++++++++++++++++ arch/arm64/boot/dts/marvell/armada-ap80x.dtsi | 18 ++++++++ drivers/iommu/arm-smmu-impl.c | 45 +++++++++++++++++++ drivers/iommu/arm-smmu.c | 11 +++-- 7 files changed, 145 insertions(+), 4 deletions(-) -- 2.17.1 _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org<mailto:iommu@lists.linux-foundation.org> https://lists.linuxfoundation.org/mailman/listinfo/iommu
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