Add mt8192 iommu support.

For multi domain, Add 1M gap for the vdec domain size. That is because
vdec HW has a end address register which require (start_addr +
len) rather than (start_addr + len - 1). Take a example, if the start_addr
is 0xfff00000, size is 0x100000, then the end_address is 0xfff00000 +
0x100000 = 0x1 0000 0000. but the register only is 32bit. thus HW will get
the end address is 0. To avoid this issue, I add 1M gap for this.

Signed-off-by: Yong Wu <yong...@mediatek.com>
---
 drivers/iommu/mtk_iommu.c | 22 ++++++++++++++++++++++
 drivers/iommu/mtk_iommu.h |  1 +
 2 files changed, 23 insertions(+)

diff --git a/drivers/iommu/mtk_iommu.c b/drivers/iommu/mtk_iommu.c
index 355052a98b14..22f01eea0a61 100644
--- a/drivers/iommu/mtk_iommu.c
+++ b/drivers/iommu/mtk_iommu.c
@@ -173,6 +173,16 @@ static const struct mtk_iommu_iova_region single_domain[] 
= {
        {.iova_base = 0,                .size = SZ_4G},
 };
 
+static const struct mtk_iommu_iova_region mt8192_multi_dom[] = {
+       { .iova_base = 0x0,             .size = SZ_4G},         /* disp: 0 ~ 4G 
*/
+       #if IS_ENABLED(CONFIG_ARCH_DMA_ADDR_T_64BIT)
+       { .iova_base = SZ_4G,           .size = SZ_4G - SZ_1M}, /* vdec: 4G ~ 
8G gap: 1M */
+       { .iova_base = SZ_4G * 2,       .size = SZ_4G - SZ_1M}, /* CAM/MDP: 8G 
~ 12G */
+       { .iova_base = 0x240000000ULL,  .size = 0x4000000},     /* CCU0 */
+       { .iova_base = 0x244000000ULL,  .size = 0x4000000},     /* CCU1 */
+       #endif
+};
+
 /*
  * There may be 1 or 2 M4U HWs, But we always expect they are in the same 
domain
  * for the performance.
@@ -1019,12 +1029,24 @@ static const struct mtk_iommu_plat_data mt8183_data = {
        .larbid_remap = {{0}, {4}, {5}, {6}, {7}, {2}, {3}, {1}},
 };
 
+static const struct mtk_iommu_plat_data mt8192_data = {
+       .m4u_plat       = M4U_MT8192,
+       .flags          = HAS_BCLK | HAS_SUB_COMM | OUT_ORDER_WR_EN |
+                         WR_THROT_EN | IOVA_34_EN,
+       .inv_sel_reg    = REG_MMU_INV_SEL_GEN2,
+       .iova_region    = mt8192_multi_dom,
+       .iova_region_nr = ARRAY_SIZE(mt8192_multi_dom),
+       .larbid_remap   = {{0}, {1}, {4, 5}, {7}, {2}, {9, 11, 19, 20},
+                          {0, 14, 16}, {0, 13, 18, 17}},
+};
+
 static const struct of_device_id mtk_iommu_of_ids[] = {
        { .compatible = "mediatek,mt2712-m4u", .data = &mt2712_data},
        { .compatible = "mediatek,mt6779-m4u", .data = &mt6779_data},
        { .compatible = "mediatek,mt8167-m4u", .data = &mt8167_data},
        { .compatible = "mediatek,mt8173-m4u", .data = &mt8173_data},
        { .compatible = "mediatek,mt8183-m4u", .data = &mt8183_data},
+       { .compatible = "mediatek,mt8192-m4u", .data = &mt8192_data},
        {}
 };
 
diff --git a/drivers/iommu/mtk_iommu.h b/drivers/iommu/mtk_iommu.h
index b54862307128..e96b1b8639f4 100644
--- a/drivers/iommu/mtk_iommu.h
+++ b/drivers/iommu/mtk_iommu.h
@@ -43,6 +43,7 @@ enum mtk_iommu_plat {
        M4U_MT8167,
        M4U_MT8173,
        M4U_MT8183,
+       M4U_MT8192,
 };
 
 struct mtk_iommu_iova_region;
-- 
2.18.0

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