> On Mar 17, 2021, at 9:46 PM, Longpeng (Mike, Cloud Infrastructure Service > Product Dept.) <longpe...@huawei.com> wrote: >
[Snip] > > NOTE, the magical thing happen...(*Operation-4*) we write the PTE > of Operation-1 from 0 to 0x3 which means can Read/Write, and then > we trigger DMA read again, it success and return the data of HPA 0 !! > > Why we modify the older page table would make sense ? As we > have discussed previously, the cache flush part of the driver is correct, > it call flush_iotlb after (b) and no need to flush after (c). But the result > of the experiment shows the older page table or older caches is effective > actually. > > Any ideas ? Interesting. Sounds as if there is some page-walk cache that was not invalidated properly.
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