On Thu, May 13, 2021 at 06:00:12AM -0700, Jacob Pan wrote: > > > If you want to do SVA PASID then it also must come with DMA APIs to > > > manage the CPU cache coherence that are all NOP's on x86. > > > > Yes. And we have plenty of precende where an IOMMU is in "bypass" mode > > to allow access to all memory and then uses the simple dma-direct case. > I agree it is better not to expose the entire direct map. But the missing > piece of using DMA APIs is the PASID. The caller needs the PASID value to > do work submission once buffer is mapped.
You still haven't explained why the kernel driver should have a PASID at all. Jason _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu
