On Wed, Jun 30, 2021 at 10:34:42AM +0800, Yong Wu wrote: > In mt8195, we have a new IOMMU that is for INFRA IOMMU. its masters > mainly are PCIe and USB. Different with MM IOMMU, all these masters > connect with IOMMU directly, there is no mediatek,larbs property for > infra IOMMU. > > Another thing is about PCIe ports. currently the function > "of_iommu_configure_dev_id" only support the id number is 1, But our > PCIe have two ports, one is for reading and the other is for writing. > see more about the PCIe patch in this patchset. Thus, I only list > the reading id here and add the other id in our driver. > > Signed-off-by: Yong Wu <yong...@mediatek.com> > --- > .../bindings/iommu/mediatek,iommu.yaml | 14 +++++++++++++- > .../dt-bindings/memory/mt8195-memory-port.h | 18 ++++++++++++++++++ > include/dt-bindings/memory/mtk-memory-port.h | 2 ++ > 3 files changed, 33 insertions(+), 1 deletion(-) > > diff --git a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > index 9b04630158c8..6f3ff631c06b 100644 > --- a/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > +++ b/Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml > @@ -79,6 +79,7 @@ properties: > - mediatek,mt8192-m4u # generation two > - mediatek,mt8195-iommu-vdo # generation two > - mediatek,mt8195-iommu-vpp # generation two > + - mediatek,mt8195-iommu-infra # generation two > > - description: mt7623 generation one > items: > @@ -129,7 +130,6 @@ required: > - compatible > - reg > - interrupts > - - mediatek,larbs > - '#iommu-cells' > > allOf: > @@ -161,6 +161,18 @@ allOf: > required: > - power-domains > > + - if: > + not: > + properties: > + compatible: > + items: > + enum: > + - mediatek,mt8195-iommu-infra
This is saying all items are 'mediatek,mt8195-iommu-infra'. Other schemas prevent that, but really this should be: compatible: contains: const: mediatek,mt8195-iommu-infra > + > + then: > + required: > + - mediatek,larbs > + > additionalProperties: false > > examples: > diff --git a/include/dt-bindings/memory/mt8195-memory-port.h > b/include/dt-bindings/memory/mt8195-memory-port.h > index 783bcae8cdea..67afad848725 100644 > --- a/include/dt-bindings/memory/mt8195-memory-port.h > +++ b/include/dt-bindings/memory/mt8195-memory-port.h > @@ -387,4 +387,22 @@ > #define M4U_PORT_L28_CAM_DRZS4NO_R1 MTK_M4U_ID(28, 5) > #define M4U_PORT_L28_CAM_TNCSO_R1 MTK_M4U_ID(28, 6) > > +/* infra iommu ports */ > +/* PCIe1: read: BIT16; write BIT17. */ > +#define M4U_PORT_INFRA_PCIE1 MTK_IFAIOMMU_PERI_ID(16) > +/* PCIe0: read: BIT18; write BIT19. */ > +#define M4U_PORT_INFRA_PCIE0 MTK_IFAIOMMU_PERI_ID(18) > +#define M4U_PORT_INFRA_SSUSB_P3_R MTK_IFAIOMMU_PERI_ID(20) > +#define M4U_PORT_INFRA_SSUSB_P3_W MTK_IFAIOMMU_PERI_ID(21) > +#define M4U_PORT_INFRA_SSUSB_P2_R MTK_IFAIOMMU_PERI_ID(22) > +#define M4U_PORT_INFRA_SSUSB_P2_W MTK_IFAIOMMU_PERI_ID(23) > +#define M4U_PORT_INFRA_SSUSB_P1_1_R MTK_IFAIOMMU_PERI_ID(24) > +#define M4U_PORT_INFRA_SSUSB_P1_1_W MTK_IFAIOMMU_PERI_ID(25) > +#define M4U_PORT_INFRA_SSUSB_P1_0_R MTK_IFAIOMMU_PERI_ID(26) > +#define M4U_PORT_INFRA_SSUSB_P1_0_W MTK_IFAIOMMU_PERI_ID(27) > +#define M4U_PORT_INFRA_SSUSB2_R MTK_IFAIOMMU_PERI_ID(28) > +#define M4U_PORT_INFRA_SSUSB2_W MTK_IFAIOMMU_PERI_ID(29) > +#define M4U_PORT_INFRA_SSUSB_R MTK_IFAIOMMU_PERI_ID(30) > +#define M4U_PORT_INFRA_SSUSB_W MTK_IFAIOMMU_PERI_ID(31) > + > #endif > diff --git a/include/dt-bindings/memory/mtk-memory-port.h > b/include/dt-bindings/memory/mtk-memory-port.h > index 7d64103209af..2f68a0511a25 100644 > --- a/include/dt-bindings/memory/mtk-memory-port.h > +++ b/include/dt-bindings/memory/mtk-memory-port.h > @@ -12,4 +12,6 @@ > #define MTK_M4U_TO_LARB(id) (((id) >> 5) & 0x1f) > #define MTK_M4U_TO_PORT(id) ((id) & 0x1f) > > +#define MTK_IFAIOMMU_PERI_ID(port) MTK_M4U_ID(0, port) > + > #endif > -- > 2.18.0 > > _______________________________________________ iommu mailing list iommu@lists.linux-foundation.org https://lists.linuxfoundation.org/mailman/listinfo/iommu